mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
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472100721b
Commit8a55fbe4c9("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") claims that all interconnects have clocks and MMIO address space, but that is just not true. Only few have. Bindings should restrict properties and should not allow specifying non-existing hardware description, so fix missing constraints for 'reg' and 'clocks'. Fixes:8a55fbe4c9("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251129094612.16838-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
130 lines
3.3 KiB
YAML
130 lines
3.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P
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maintainers:
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- Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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description: |
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RPMh interconnect providers support system bandwidth requirements through
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RPMh hardware accelerators known as Bus Clock Manager (BCM).
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See also: include/dt-bindings/interconnect/qcom,sa8775p.h
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properties:
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compatible:
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enum:
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- qcom,sa8775p-aggre1-noc
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- qcom,sa8775p-aggre2-noc
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- qcom,sa8775p-clk-virt
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- qcom,sa8775p-config-noc
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- qcom,sa8775p-dc-noc
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- qcom,sa8775p-gem-noc
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- qcom,sa8775p-gpdsp-anoc
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- qcom,sa8775p-lpass-ag-noc
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- qcom,sa8775p-mc-virt
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- qcom,sa8775p-mmss-noc
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- qcom,sa8775p-nspa-noc
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- qcom,sa8775p-nspb-noc
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- qcom,sa8775p-pcie-anoc
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- qcom,sa8775p-system-noc
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reg:
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maxItems: 1
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clocks:
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minItems: 2
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maxItems: 5
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required:
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- compatible
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allOf:
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- $ref: qcom,rpmh-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sa8775p-aggre1-noc
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then:
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properties:
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clocks:
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items:
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- description: aggre UFS PHY AXI clock
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- description: aggre QUP PRIM AXI clock
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- description: aggre USB2 PRIM AXI clock
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- description: aggre USB3 PRIM AXI clock
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- description: aggre USB3 SEC AXI clock
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sa8775p-aggre2-noc
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then:
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properties:
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clocks:
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items:
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- description: aggre UFS CARD AXI clock
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- description: RPMH CC IPA clock
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sa8775p-config-noc
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- qcom,sa8775p-dc-noc
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- qcom,sa8775p-gem-noc
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- qcom,sa8775p-gpdsp-anoc
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- qcom,sa8775p-lpass-ag-noc
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- qcom,sa8775p-mmss-noc
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- qcom,sa8775p-nspa-noc
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- qcom,sa8775p-nspb-noc
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- qcom,sa8775p-pcie-anoc
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- qcom,sa8775p-system-noc
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then:
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properties:
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clocks: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sa8775p-clk-virt
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- qcom,sa8775p-mc-virt
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then:
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properties:
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reg: false
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clocks: false
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,sa8775p-gcc.h>
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clk_virt: interconnect-clk-virt {
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compatible = "qcom,sa8775p-clk-virt";
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#interconnect-cells = <2>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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aggre1_noc: interconnect@16c0000 {
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compatible = "qcom,sa8775p-aggre1-noc";
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reg = <0x016c0000 0x18080>;
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#interconnect-cells = <2>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
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<&gcc GCC_AGGRE_NOC_QUPV3_AXI_CLK>,
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<&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>,
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<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
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<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>;
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};
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