Sylwester Nawrocki a701fe3851 clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks ...

The ISP clock registers belong to the ISP power domain and may change
their values if this power domain is switched off/on. Add
CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached
data when setting or getting frequency of those clocks.

Without this fix the FIMC-IS Cortex-A5 core and AXI bus clocks have
incorrect frequencies, which breaks the ISP operation and starting the
video pipeline fails with timeouts reported by the FIMC-IS firmware.

See related commit 722a860ecb "[media]
exynos4-is: Fix FIMC-IS clocks initialization" for more details.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

2013-08-13 10:01:56 -07:00

..

clk-exynos4.c

clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks

2013-08-13 10:01:56 -07:00

clk-exynos5250.c

Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2013-07-02 14:33:21 -07:00

clk-exynos5420.c

clk: exynos5420: register clocks using common clock framework

2013-06-19 04:09:34 +09:00

clk-exynos5440.c

clk: exynos: prepare for multiplatform

2013-04-19 23:00:38 +02:00

clk-exynos-audss.c

clk: samsung: register audio subsystem clocks using common clock framework

2013-06-19 03:28:41 +09:00

clk-pll.c

clk: samsung: Fix pll36xx_recalc_rate to handle kdiv properly

2013-06-11 09:51:26 -07:00

clk-pll.h

clk: samsung: add pll clock registration helper functions

2013-03-25 18:16:37 +09:00

clk.c

clk: samsung: Fix compilation error

2013-04-08 23:43:12 +09:00

clk.h

clk: samsung: Add MUX_FA macro to pass flag and alias

2013-06-22 10:50:41 -07:00

Makefile

clk: exynos5420: register clocks using common clock framework

2013-06-19 04:09:34 +09:00