Zhan Liu f548f4291e drm/amd/display: Correct MPC split policy for DCN301 ...

[Why]
DCN301 has seamless boot enabled. With MPC split enabled
at the same time, system will hang.

[How]
Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have
ODM combine enabled on DCN301, pipe split is not necessary here.

Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2022-01-19 22:33:36 -05:00

..

dcn301_dccg.c

drm/amd/display: Add interface for ADD & DROP PIXEL Registers

2021-06-08 12:22:42 -04:00

dcn301_dccg.h

…

dcn301_dio_link_encoder.c

…

dcn301_dio_link_encoder.h

…

dcn301_hubbub.c

drm/amd/display: log additional register state for debug

2021-07-21 13:39:25 -04:00

dcn301_hubbub.h

…

dcn301_hwseq.c

…

dcn301_hwseq.h

…

dcn301_init.c

drm/amd: append missing includes

2021-12-13 16:32:34 -05:00

dcn301_init.h

…

dcn301_panel_cntl.c

drm/amd/display: fix function scopes

2021-12-13 16:34:26 -05:00

dcn301_panel_cntl.h

…

dcn301_resource.c

drm/amd/display: Correct MPC split policy for DCN301

2022-01-19 22:33:36 -05:00

dcn301_resource.h

drm/amd/display: move FPU associated DCN301 code to DML folder

2021-10-28 14:26:50 -04:00

Makefile

drm/amd/display: move FPU associated DCN301 code to DML folder

2021-10-28 14:26:50 -04:00