Commit 003759d4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v7.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:

 - Implement the GPIO .get_direction() callback in the Mediatek driver
   to rid dmesg warnings

 - Mark the Qualcomm IPQ4019 pins used as GPIO as using the GPIO pin
   function, so there is no conflict with orthogonal muxing

 - Fix incorrect settings of the "PUPD" (pull-up-pull-down) register
   during suspend/resume in the Renesas RZG2L

 - Fix the SMT register cache to be per-bank in the Renesas RZG2L

 - Fix the QDSS track clock and control pin group names in the Qualcomm
   Eliza driver

 - Fix a deadlock in the Amlogic driver, caused by playing around in
   sysfs

 - Fix some GPIO wakeup interrupt handling in Qualcomm QCS615. and a
   similar fix for the Qualcomm SM8150

 - Allow parsing DTs without explicit function nodes in the Freescale
   i.MX1 driver

 - Enable the IRQ for the WACF2200 touchscreen using a DMI quirk

* tag 'pinctrl-v7.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl-amd: enable IRQ for WACF2200 touchscreen on Lenovo Yoga 7 14AGP11
  pinctrl: imx1: Allow parsing DT without function nodes
  pinctrl: qcom: Fix wakeirq map by removing disconnected irqs for sm8150
  pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615
  pinctrl: meson: amlogic-a4: fix deadlock issue
  pinctrl: qcom: eliza: Fix QDSS trace clock/control pingroup names
  pinctrl: renesas: rzg2l: Fix SMT register cache handling
  pinctrl: renesas: rzg2l: Fix incorrect PUPD register offset for high pins during suspend/resume
  pinctrl: qcom: ipq4019: mark gpio as a GPIO pin function
  pinctrl: mediatek: moore: implement gpio_chip::get_direction()
parents 99e08deb 3812a9e8

drivers/pinctrl/freescale/pinctrl-imx1-core.c

+41 −7
Original line number Diff line number Diff line
@@ -540,10 +540,34 @@ static int imx1_pinctrl_parse_functions(struct device_node *np, 
	return 0;

}



/*

 * Check if the DT contains pins in the direct child nodes. This indicates the

 * newer DT format to store pins. This function returns true if the first found

 * fsl,pins property is in a child of np. Otherwise false is returned.

 */

static bool imx1_pinctrl_dt_is_flat_functions(struct device_node *np)

{

	struct device_node *function_np;

	struct device_node *pinctrl_np;



	for_each_child_of_node(np, function_np) {

		if (of_property_present(function_np, "fsl,pins"))

			return true;



		for_each_child_of_node(function_np, pinctrl_np) {

			if (of_property_present(pinctrl_np, "fsl,pins"))

				return false;

		}

	}



	return true;

}



static int imx1_pinctrl_parse_dt(struct platform_device *pdev,

		struct imx1_pinctrl *pctl, struct imx1_pinctrl_soc_info *info)

{

	struct device_node *np = pdev->dev.of_node;

	bool flat_funcs;

	int ret;

	u32 nfuncs = 0;

	u32 ngroups = 0;
@@ -552,10 +576,16 @@ static int imx1_pinctrl_parse_dt(struct platform_device *pdev, 
	if (!np)

		return -ENODEV;



	flat_funcs = imx1_pinctrl_dt_is_flat_functions(np);

	if (flat_funcs) {

		nfuncs = 1;

		ngroups = of_get_child_count(np);

	} else {

		for_each_child_of_node_scoped(np, child) {

			++nfuncs;

			ngroups += of_get_child_count(child);

		}

	}



	if (!nfuncs) {

		dev_err(&pdev->dev, "No pin functions defined\n");
@@ -574,11 +604,15 @@ static int imx1_pinctrl_parse_dt(struct platform_device *pdev, 
	if (!info->functions || !info->groups)

		return -ENOMEM;



	if (flat_funcs) {

		imx1_pinctrl_parse_functions(np, info, 0);

	} else {

		for_each_child_of_node_scoped(np, child) {

			ret = imx1_pinctrl_parse_functions(child, info, ifunc++);

			if (ret == -ENOMEM)

				return -ENOMEM;

		}

	}



	return 0;

}

drivers/pinctrl/mediatek/pinctrl-moore.c

+18 −0
Original line number Diff line number Diff line
@@ -520,6 +520,23 @@ static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, 
	return pinctrl_gpio_direction_output(chip, gpio);

}



static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)

{

	struct mtk_pinctrl *hw = gpiochip_get_data(chip);

	const struct mtk_pin_desc *desc;

	int ret, dir;



	desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];

	if (!desc->name)

		return -ENOTSUPP;



	ret = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &dir);

	if (ret)

		return ret;



	return dir ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;

}



static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)

{

	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
@@ -566,6 +583,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw) 
	chip->parent		= hw->dev;

	chip->request		= gpiochip_generic_request;

	chip->free		= gpiochip_generic_free;

	chip->get_direction	= mtk_gpio_get_direction;

	chip->direction_input	= pinctrl_gpio_direction_input;

	chip->direction_output	= mtk_gpio_direction_output;

	chip->get		= mtk_gpio_get;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

+3 −3
Original line number Diff line number Diff line
@@ -292,7 +292,7 @@ static int aml_calc_reg_and_bit(struct pinctrl_gpio_range *range, 
static int aml_pinconf_get_pull(struct aml_pinctrl *info, unsigned int pin)

{

	struct pinctrl_gpio_range *range =

			 pinctrl_find_gpio_range_from_pin(info->pctl, pin);

			 pinctrl_find_gpio_range_from_pin_nolock(info->pctl, pin);

	struct aml_gpio_bank *bank = gpio_chip_to_bank(range->gc);

	unsigned int reg, bit, val;

	int ret, conf;
@@ -326,7 +326,7 @@ static int aml_pinconf_get_drive_strength(struct aml_pinctrl *info, 
					  u16 *drive_strength_ua)

{

	struct pinctrl_gpio_range *range =

			 pinctrl_find_gpio_range_from_pin(info->pctl, pin);

			 pinctrl_find_gpio_range_from_pin_nolock(info->pctl, pin);

	struct aml_gpio_bank *bank = gpio_chip_to_bank(range->gc);

	unsigned int reg, bit;

	unsigned int val;
@@ -365,7 +365,7 @@ static int aml_pinconf_get_gpio_bit(struct aml_pinctrl *info, 
				    unsigned int reg_type)

{

	struct pinctrl_gpio_range *range =

			 pinctrl_find_gpio_range_from_pin(info->pctl, pin);

			 pinctrl_find_gpio_range_from_pin_nolock(info->pctl, pin);

	struct aml_gpio_bank *bank = gpio_chip_to_bank(range->gc);

	unsigned int reg, bit, val;

	int ret;

drivers/pinctrl/pinctrl-amd.c

+35 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include <linux/interrupt.h>

#include <linux/bitops.h>

#include <linux/pinctrl/pinconf.h>

#include <linux/dmi.h>

#include <linux/pinctrl/pinconf-generic.h>

#include <linux/pinctrl/pinmux.h>

#include <linux/string_choices.h>
@@ -39,6 +40,39 @@ 
static struct amd_gpio *pinctrl_dev;

#endif



static const struct dmi_system_id amd_gpio_quirk_yoga7_14agp11[] = {

	{

		.matches = {

			DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),

			DMI_MATCH(DMI_PRODUCT_NAME, "83TD"),

			DMI_MATCH(DMI_BOARD_NAME, "LNVNB161216"),

		},

	},

	{ }

};



static void amd_gpio_apply_quirks(struct amd_gpio *gpio_dev)

{

	const unsigned int pin = 157; /* WACF2200 GpioInt per ACPI _CRS */

	unsigned long flags;

	u32 reg;



	if (!dmi_check_system(amd_gpio_quirk_yoga7_14agp11))

		return;

	if (pin >= gpio_dev->gc.ngpio)

		return;



	raw_spin_lock_irqsave(&gpio_dev->lock, flags);

	reg = readl(gpio_dev->base + pin * 4);

	reg |= BIT(INTERRUPT_ENABLE_OFF) | BIT(INTERRUPT_MASK_OFF);

	writel(reg, gpio_dev->base + pin * 4);

	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);



	dev_info(&gpio_dev->pdev->dev,

		 "Enabled IRQ for GPIO %u (Yoga 7 14AGP11 touchscreen)\n",

		 pin);

}



static int amd_gpio_get_direction(struct gpio_chip *gc, unsigned offset)

{

	unsigned long flags;
@@ -1219,6 +1253,7 @@ static int amd_gpio_probe(struct platform_device *pdev) 


	/* Disable and mask interrupts */

	amd_gpio_irq_init(gpio_dev);

	amd_gpio_apply_quirks(gpio_dev);



	girq = &gpio_dev->gc.irq;

	gpio_irq_chip_set_chip(girq, &amd_gpio_irqchip);

drivers/pinctrl/qcom/pinctrl-eliza.c

+4 −4
Original line number Diff line number Diff line
@@ -1340,7 +1340,7 @@ static const struct msm_pingroup eliza_groups[] = { 
	[51] = PINGROUP(51, _, _, _, _, _, _, _, _, _, _, _),

	[52] = PINGROUP(52, qup1_se2, pcie1_clk_req_n, qup1_se2, ddr_bist_complete, qdss_gpio_tracedata, _, vsense_trigger_mirnat, _, _, _, _),

	[53] = PINGROUP(53, qup1_se2, qup1_se2, gcc_gp1, ddr_bist_stop, _, qdss_gpio_tracedata, _, _, _, _, _),

	[54] = PINGROUP(54, qup1_se2, qup1_se6, qdss_gpio_tracedata, gnss_adc1, atest_usb, ddr_pxi0, _, _, _, _, _),

	[54] = PINGROUP(54, qup1_se2, qup1_se6, qdss_gpio_traceclk, gnss_adc1, atest_usb, ddr_pxi0, _, _, _, _, _),

	[55] = PINGROUP(55, qup1_se2, dp0_hot, qup1_se6, _, gnss_adc0, atest_usb, ddr_pxi0, _, _, _, _),

	[56] = PINGROUP(56, usb0_hs, tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4, _, _, _, _, _, _),

	[57] = PINGROUP(57, sd_write_protect, _, _, _, _, _, _, _, _, _, _),
@@ -1358,7 +1358,7 @@ static const struct msm_pingroup eliza_groups[] = { 
	[69] = PINGROUP(69, cam_mclk, audio_ext_mclk0, resout_gpio, prng_rosc1, _, _, _, _, _, _, _),

	[70] = PINGROUP(70, cci_i2c_sda, tmess_prng2, _, phase_flag, atest_char, _, _, _, _, _, _),

	[71] = PINGROUP(71, cci_i2c_scl, tmess_prng3, _, phase_flag, atest_char, _, _, _, _, _, _),

	[72] = PINGROUP(72, cci_i2c_sda, tmess_prng1, qdss_gpio_tracedata, atest_char, _, _, _, _, _, _, _),

	[72] = PINGROUP(72, cci_i2c_sda, tmess_prng1, qdss_gpio_tracectl, atest_char, _, _, _, _, _, _, _),

	[73] = PINGROUP(73, cci_i2c_scl, tmess_prng0, qdss_cti, atest_char, _, _, _, _, _, _, _),

	[74] = PINGROUP(74, cci_i2c_sda, prng_rosc3, qdss_cti, atest_char, _, _, _, _, _, _, _),

	[75] = PINGROUP(75, cci_i2c_scl, _, phase_flag, _, _, _, _, _, _, _, _),
@@ -1430,10 +1430,10 @@ static const struct msm_pingroup eliza_groups[] = { 
	[141] = PINGROUP(141, _, _, _, _, _, _, _, _, _, _, egpio),

	[142] = PINGROUP(142, _, _, _, _, _, _, _, _, _, _, egpio),

	[143] = PINGROUP(143, _, _, _, _, _, _, _, _, _, _, egpio),

	[144] = PINGROUP(144, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio),

	[144] = PINGROUP(144, _, qdss_gpio_tracectl, _, _, _, _, _, _, _, _, egpio),

	[145] = PINGROUP(145, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, _, egpio),

	[146] = PINGROUP(146, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio),

	[147] = PINGROUP(147, ddr_bist_fail, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio),

	[147] = PINGROUP(147, ddr_bist_fail, _, qdss_gpio_traceclk, _, _, _, _, _, _, _, egpio),

	[148] = PINGROUP(148, _, _, _, _, _, _, _, _, _, _, egpio),

	[149] = PINGROUP(149, _, _, _, _, _, _, _, _, _, _, egpio),

	[150] = PINGROUP(150, _, _, _, _, _, _, _, _, _, _, egpio),