Commit 0085d49d authored by Matt Atwood's avatar Matt Atwood Committed by Matt Roper
Browse files

drm/i915: Set max cdclk for display 30.02 



Display version 30.02 has a lower max cdclk rate than 30.00.

Bspec: 68861
Signed-off-by: default avatarMatt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: default avatarDnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250613193146.3549862-6-dnyaneshwar.bhadane@intel.com
parent bd031cd1

drivers/gpu/drm/i915/display/intel_cdclk.c

+3 −1
Original line number Diff line number Diff line
@@ -3386,7 +3386,9 @@ static int intel_compute_max_dotclk(struct intel_display *display) 
 */

void intel_update_max_cdclk(struct intel_display *display)

{

	if (DISPLAY_VER(display) >= 30) {

	if (DISPLAY_VERx100(display) >= 3002) {

		display->cdclk.max_cdclk_freq = 480000;

	} else if (DISPLAY_VER(display) >= 30) {

		display->cdclk.max_cdclk_freq = 691200;

	} else if (display->platform.jasperlake || display->platform.elkhartlake) {

		if (display->cdclk.hw.ref == 24000)