Commit 008db7d4 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe/mocs: Use scope-based cleanup 



Using scope-based cleanup for runtime PM and forcewake in the MOCS code
allows us to eliminate some goto-based error handling and simplify some
other functions.

Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Link: https://patch.msgid.link/20251118164338.3572146-36-matthew.d.roper@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent e9bc4162

drivers/gpu/drm/xe/tests/xe_mocs.c

+6 −11
Original line number Diff line number Diff line
@@ -43,14 +43,12 @@ static void read_l3cc_table(struct xe_gt *gt, 
{

	struct kunit *test = kunit_get_current_test();

	u32 l3cc, l3cc_expected;

	unsigned int fw_ref, i;

	unsigned int i;

	u32 reg_val;



	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {

		xe_force_wake_put(gt_to_fw(gt), fw_ref);

	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL))

		KUNIT_FAIL_AND_ABORT(test, "Forcewake Failed.\n");

	}



	for (i = 0; i < info->num_mocs_regs; i++) {

		if (!(i & 1)) {
@@ -74,7 +72,6 @@ static void read_l3cc_table(struct xe_gt *gt, 
		KUNIT_EXPECT_EQ_MSG(test, l3cc_expected, l3cc,

				    "l3cc idx=%u has incorrect val.\n", i);

	}

	xe_force_wake_put(gt_to_fw(gt), fw_ref);

}



static void read_mocs_table(struct xe_gt *gt,
@@ -82,14 +79,14 @@ static void read_mocs_table(struct xe_gt *gt, 
{

	struct kunit *test = kunit_get_current_test();

	u32 mocs, mocs_expected;

	unsigned int fw_ref, i;

	unsigned int i;

	u32 reg_val;



	KUNIT_EXPECT_TRUE_MSG(test, info->unused_entries_index,

			      "Unused entries index should have been defined\n");



	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);

	KUNIT_ASSERT_NE_MSG(test, fw_ref, 0, "Forcewake Failed.\n");

	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);

	KUNIT_ASSERT_NE_MSG(test, fw_ref.domains, 0, "Forcewake Failed.\n");



	for (i = 0; i < info->num_mocs_regs; i++) {

		if (regs_are_mcr(gt))
@@ -106,8 +103,6 @@ static void read_mocs_table(struct xe_gt *gt, 
		KUNIT_EXPECT_EQ_MSG(test, mocs_expected, mocs,

				    "mocs reg 0x%x has incorrect val.\n", i);

	}



	xe_force_wake_put(gt_to_fw(gt), fw_ref);

}



static int mocs_kernel_test_run_device(struct xe_device *xe)

drivers/gpu/drm/xe/xe_mocs.c

+6 −12
Original line number Diff line number Diff line
@@ -811,26 +811,20 @@ int xe_mocs_dump(struct xe_gt *gt, struct drm_printer *p) 
	struct xe_device *xe = gt_to_xe(gt);

	enum xe_force_wake_domains domain;

	struct xe_mocs_info table;

	unsigned int fw_ref, flags;

	int err = 0;

	unsigned int flags;



	flags = get_mocs_settings(xe, &table);



	domain = flags & HAS_LNCF_MOCS ? XE_FORCEWAKE_ALL : XE_FW_GT;

	xe_pm_runtime_get_noresume(xe);

	fw_ref = xe_force_wake_get(gt_to_fw(gt), domain);



	if (!xe_force_wake_ref_has_domain(fw_ref, domain)) {

		err = -ETIMEDOUT;

		goto err_fw;

	}

	guard(xe_pm_runtime_noresume)(xe);

	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), domain);

	if (!xe_force_wake_ref_has_domain(fw_ref.domains, domain))

		return -ETIMEDOUT;



	table.ops->dump(&table, flags, gt, p);



err_fw:

	xe_force_wake_put(gt_to_fw(gt), fw_ref);

	xe_pm_runtime_put(xe);

	return err;

	return 0;

}



#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)