dt-bindings: net: Convert amd,xgbe-seattle-v1a to DT schema

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/amd,xgbe-seattle-v1a.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AMD XGBE Seattle v1a

maintainers:

  - Shyam Sundar S K <Shyam-sundar.S-k@amd.com>

allOf:

  - $ref: /schemas/net/ethernet-controller.yaml#

properties:

  compatible:

    const: amd,xgbe-seattle-v1a

  reg:

    items:

      - description: MAC registers

      - description: PCS registers

      - description: SerDes Rx/Tx registers

      - description: SerDes integration registers (1/2)

      - description: SerDes integration registers (2/2)

  interrupts:

    description: Device interrupts. The first entry is the general device

      interrupt. If amd,per-channel-interrupt is specified, each DMA channel

      interrupt must be specified. The last entry is the PCS auto-negotiation

      interrupt.

    minItems: 2

    maxItems: 6

  clocks:

    items:

      - description: DMA clock for the device

      - description: PTP clock for the device

  clock-names:

    items:

      - const: dma_clk

      - const: ptp_clk

  iommus:

    maxItems: 1

  phy-mode: true

  dma-coherent: true

  amd,per-channel-interrupt:

    description: Indicates that Rx and Tx complete will generate a unique

      interrupt for each DMA channel.

    type: boolean

  amd,speed-set:

    description: >

      Speed capabilities of the device.

        0 = 1GbE and 10GbE

        1 = 2.5GbE and 10GbE

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [0, 1]

  amd,serdes-blwc:

    description: Baseline wandering correction enablement for each speed.

    $ref: /schemas/types.yaml#/definitions/uint32-array

    minItems: 3

    maxItems: 3

    items:

      enum: [0, 1]

  amd,serdes-cdr-rate:

    description: CDR rate speed selection for each speed.

    $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      - description: CDR rate for 1GbE

      - description: CDR rate for 2.5GbE

      - description: CDR rate for 10GbE

  amd,serdes-pq-skew:

    description: PQ data sampling skew for each speed.

    $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      - description: PQ skew for 1GbE

      - description: PQ skew for 2.5GbE

      - description: PQ skew for 10GbE

  amd,serdes-tx-amp:

    description: TX amplitude boost for each speed.

    $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      - description: TX amplitude for 1GbE

      - description: TX amplitude for 2.5GbE

      - description: TX amplitude for 10GbE

  amd,serdes-dfe-tap-config:

    description: DFE taps available to run for each speed.

    $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      - description: DFE taps available for 1GbE

      - description: DFE taps available for 2.5GbE

      - description: DFE taps available for 10GbE

  amd,serdes-dfe-tap-enable:

    description: DFE taps to enable for each speed.

    $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      - description: DFE taps to enable for 1GbE

      - description: DFE taps to enable for 2.5GbE

      - description: DFE taps to enable for 10GbE

required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - phy-mode

unevaluatedProperties: false

examples:

  - |

    ethernet@e0700000 {

        compatible = "amd,xgbe-seattle-v1a";

        reg = <0xe0700000 0x80000>,

              <0xe0780000 0x80000>,

              <0xe1240800 0x00400>,

              <0xe1250000 0x00060>,

              <0xe1250080 0x00004>;

        interrupts = <0 325 4>,

                     <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>,

                     <0 323 4>;

        amd,per-channel-interrupt;

        clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;

        clock-names = "dma_clk", "ptp_clk";

        phy-mode = "xgmii";

        mac-address = [ 02 a1 a2 a3 a4 a5 ];

        amd,speed-set = <0>;

        amd,serdes-blwc = <1>, <1>, <0>;

        amd,serdes-cdr-rate = <2>, <2>, <7>;

        amd,serdes-pq-skew = <10>, <10>, <30>;

        amd,serdes-tx-amp = <15>, <15>, <10>;

        amd,serdes-dfe-tap-config = <3>, <3>, <1>;

        amd,serdes-dfe-tap-enable = <0>, <0>, <127>;

    };

* AMD 10GbE driver (amd-xgbe)

Required properties:

- compatible: Should be "amd,xgbe-seattle-v1a"

- reg: Address and length of the register sets for the device

   - MAC registers

   - PCS registers

   - SerDes Rx/Tx registers

   - SerDes integration registers (1/2)

   - SerDes integration registers (2/2)

- interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt

  listed is required and is the general device interrupt. If the optional

  amd,per-channel-interrupt property is specified, then one additional

  interrupt for each DMA channel supported by the device should be specified.

  The last interrupt listed should be the PCS auto-negotiation interrupt.

- clocks:

   - DMA clock for the amd-xgbe device (used for calculating the

     correct Rx interrupt watchdog timer value on a DMA channel

     for coalescing)

   - PTP clock for the amd-xgbe device

- clock-names: Should be the names of the clocks

   - "dma_clk" for the DMA clock

   - "ptp_clk" for the PTP clock

- phy-mode: See ethernet.txt file in the same directory

Optional properties:

- dma-coherent: Present if dma operations are coherent

- amd,per-channel-interrupt: Indicates that Rx and Tx complete will generate

  a unique interrupt for each DMA channel - this requires an additional

  interrupt be configured for each DMA channel

- amd,speed-set: Speed capabilities of the device

    0 - 1GbE and 10GbE (default)

    1 - 2.5GbE and 10GbE

The MAC address will be determined using the optional properties defined in

ethernet.txt.

The following optional properties are represented by an array with each

value corresponding to a particular speed. The first array value represents

the setting for the 1GbE speed, the second value for the 2.5GbE speed and

the third value for the 10GbE speed.  All three values are required if the

property is used.

- amd,serdes-blwc: Baseline wandering correction enablement

    0 - Off

    1 - On

- amd,serdes-cdr-rate: CDR rate speed selection

- amd,serdes-pq-skew: PQ (data sampling) skew

- amd,serdes-tx-amp: TX amplitude boost

- amd,serdes-dfe-tap-config: DFE taps available to run

- amd,serdes-dfe-tap-enable: DFE taps to enable

Example:

	xgbe@e0700000 {

		compatible = "amd,xgbe-seattle-v1a";

		reg = <0 0xe0700000 0 0x80000>,

		      <0 0xe0780000 0 0x80000>,

		      <0 0xe1240800 0 0x00400>,

		      <0 0xe1250000 0 0x00060>,

		      <0 0xe1250080 0 0x00004>;

		interrupt-parent = <&gic>;

		interrupts = <0 325 4>,

			     <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>,

			     <0 323 4>;

		amd,per-channel-interrupt;

		clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;

		clock-names = "dma_clk", "ptp_clk";

		phy-mode = "xgmii";

		mac-address = [ 02 a1 a2 a3 a4 a5 ];

		amd,speed-set = <0>;

		amd,serdes-blwc = <1>, <1>, <0>;

		amd,serdes-cdr-rate = <2>, <2>, <7>;

		amd,serdes-pq-skew = <10>, <10>, <30>;

		amd,serdes-tx-amp = <15>, <15>, <10>;

		amd,serdes-dfe-tap-config = <3>, <3>, <1>;

		amd,serdes-dfe-tap-enable = <0>, <0>, <127>;

	};