Commit 00cbba47 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2 



Add SDHI2 to RZ/G3S Smarc SoM.  SDHI2 pins are multiplexed with SCIF1,
SSI0, IRQ0, IRQ1.  The selection b/w SDHI2 and SCIF1, SSI0, IRQ0, IRQ1
is done with a switch button.  To be able to select b/w these a
compilation flag has been added (SW_SD2_EN) at the moment being
instantiated to select SDHI2.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231016105344.294096-2-claudiu.beznea.uj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 51dad052

arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi

+49 −0
Original line number Diff line number Diff line
@@ -13,14 +13,21 @@ 
 * @SW_SD0_DEV_SEL:

 *	0 - SD0 is connected to eMMC

 *	1 - SD0 is connected to uSD0 card

 * @SW_SD2_EN:

 *	0 - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC

 *	1 - SD2 is connected to SoC

 */

#define SW_SD0_DEV_SEL	1

#define SW_SD2_EN	1



/ {

	compatible = "renesas,rzg3s-smarcm", "renesas,r9a08g045s33", "renesas,r9a08g045";



	aliases {

		mmc0 = &sdhi0;

#if SW_SD2_EN

		mmc2 = &sdhi2;

#endif

	};



	chosen {
@@ -63,6 +70,15 @@ reg_1p8v: regulator1 { 
		regulator-always-on;

	};

#endif



	vcc_sdhi2: regulator2 {

		compatible = "regulator-fixed";

		regulator-name = "SDHI2 Vcc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpios = <&pinctrl RZG2L_GPIO(8, 1) GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};

};



&extal_clk {
@@ -100,6 +116,17 @@ &sdhi0 { 
};

#endif



#if SW_SD2_EN

&sdhi2 {

	pinctrl-0 = <&sdhi2_pins>;

	pinctrl-names = "default";

	vmmc-supply = <&vcc_sdhi2>;

	bus-width = <4>;

	max-frequency = <50000000>;

	status = "okay";

};

#endif



&pinctrl {

	sdhi0_pins: sd0 {

		data {
@@ -139,4 +166,26 @@ sdhi0_emmc_pins: sd0-emmc { 
		       "SD0_CLK", "SD0_CMD", "SD0_RST#";

		power-source = <1800>;

	};



	sdhi2_pins: sd2 {

		data {

			pins = "P11_2", "P11_3", "P12_0", "P12_1";

			input-enable;

		};



		ctrl {

			pins = "P11_1";

			input-enable;

		};



		mux {

			pinmux = <RZG2L_PORT_PINMUX(11, 0, 8)>, /* SD2_CLK */

				 <RZG2L_PORT_PINMUX(11, 1, 8)>, /* SD2_CMD */

				 <RZG2L_PORT_PINMUX(11, 2, 8)>, /* SD2_DATA0 */

				 <RZG2L_PORT_PINMUX(11, 3, 8)>, /* SD2_DATA1 */

				 <RZG2L_PORT_PINMUX(12, 0, 8)>, /* SD2_DATA2 */

				 <RZG2L_PORT_PINMUX(12, 1, 8)>, /* SD2_DATA3 */

				 <RZG2L_PORT_PINMUX(14, 1, 7)>; /* SD2_CD# */

		};

	};

};