Unverified Commit 010e12aa authored by Alexandre Ghiti's avatar Alexandre Ghiti Committed by Palmer Dabbelt
Browse files

riscv: Move cpufeature.h macros into their own header 



asm/cmpxchg.h will soon need riscv_has_extension_unlikely() macros and
then needs to include asm/cpufeature.h which introduces a lot of header
circular dependencies.

So move the riscv_has_extension_XXX() macros into their own header which
prevents such circular dependencies by including a restricted number of
headers.

Signed-off-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarAndrea Parri <parri.andrea@gmail.com>
Link: https://lore.kernel.org/r/20241103145153.105097-2-alexghiti@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 81983758

arch/riscv/include/asm/cpufeature-macros.h

0 → 100644
+66 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright 2022-2024 Rivos, Inc

 */



#ifndef _ASM_CPUFEATURE_MACROS_H

#define _ASM_CPUFEATURE_MACROS_H



#include <asm/hwcap.h>

#include <asm/alternative-macros.h>



#define STANDARD_EXT		0



bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);

#define riscv_isa_extension_available(isa_bitmap, ext)	\

	__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)



static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor,

							 const unsigned long ext)

{

	asm goto(ALTERNATIVE("j	%l[l_no]", "nop", %[vendor], %[ext], 1)

	:

	: [vendor] "i" (vendor), [ext] "i" (ext)

	:

	: l_no);



	return true;

l_no:

	return false;

}



static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor,

							   const unsigned long ext)

{

	asm goto(ALTERNATIVE("nop", "j	%l[l_yes]", %[vendor], %[ext], 1)

	:

	: [vendor] "i" (vendor), [ext] "i" (ext)

	:

	: l_yes);



	return false;

l_yes:

	return true;

}



static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext)

{

	compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");



	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))

		return __riscv_has_extension_unlikely(STANDARD_EXT, ext);



	return __riscv_isa_extension_available(NULL, ext);

}



static __always_inline bool riscv_has_extension_likely(const unsigned long ext)

{

	compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");



	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))

		return __riscv_has_extension_likely(STANDARD_EXT, ext);



	return __riscv_isa_extension_available(NULL, ext);

}



#endif /* _ASM_CPUFEATURE_MACROS_H */

arch/riscv/include/asm/cpufeature.h

+4 −57
Original line number Diff line number Diff line
@@ -8,9 +8,11 @@ 


#include <linux/bitmap.h>

#include <linux/jump_label.h>

#include <linux/kconfig.h>

#include <linux/percpu-defs.h>

#include <linux/threads.h>

#include <asm/hwcap.h>

#include <asm/alternative-macros.h>

#include <asm/errno.h>

#include <asm/cpufeature-macros.h>



/*

 * These are probed via a device_initcall(), via either the SBI or directly
@@ -103,61 +105,6 @@ extern const size_t riscv_isa_ext_count; 
extern bool riscv_isa_fallback;



unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);



#define STANDARD_EXT		0



bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);

#define riscv_isa_extension_available(isa_bitmap, ext)	\

	__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)



static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor,

							 const unsigned long ext)

{

	asm goto(ALTERNATIVE("j	%l[l_no]", "nop", %[vendor], %[ext], 1)

	:

	: [vendor] "i" (vendor), [ext] "i" (ext)

	:

	: l_no);



	return true;

l_no:

	return false;

}



static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor,

							   const unsigned long ext)

{

	asm goto(ALTERNATIVE("nop", "j	%l[l_yes]", %[vendor], %[ext], 1)

	:

	: [vendor] "i" (vendor), [ext] "i" (ext)

	:

	: l_yes);



	return false;

l_yes:

	return true;

}



static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext)

{

	compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");



	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))

		return __riscv_has_extension_unlikely(STANDARD_EXT, ext);



	return __riscv_isa_extension_available(NULL, ext);

}



static __always_inline bool riscv_has_extension_likely(const unsigned long ext)

{

	compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");



	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))

		return __riscv_has_extension_likely(STANDARD_EXT, ext);



	return __riscv_isa_extension_available(NULL, ext);

}



static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext)

{

	compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");