Commit 01708578 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/ddi: 128b/132b SST also needs DP_TP_CTL_MODE_MST 



It's not very clearly specified, and the hardware bit is ill-named, but
128b/132b SST also needs the MST mode set in the DP_TP_CTL register.

This is preparation for enabling 128b/132b SST. This path is not
reachable yet.

Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b29fbba8c979a8bab2bf03088610fe408faaf704.1735912293.git.jani.nikula@intel.com
parent 2f82724a

drivers/gpu/drm/i915/display/intel_ddi.c

+4 −2
Original line number Diff line number Diff line
@@ -3655,7 +3655,8 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp *intel_dp, 


	/* 6.d Configure and enable DP_TP_CTL with link training pattern 1 selected */

	dp_tp_ctl = DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_PAT1;

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST) ||

	    intel_dp_is_uhbr(crtc_state)) {

		dp_tp_ctl |= DP_TP_CTL_MODE_MST;

	} else {

		dp_tp_ctl |= DP_TP_CTL_MODE_SST;
@@ -3715,7 +3716,8 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp, 
	}



	dp_tp_ctl = DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_PAT1;

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST) ||

	    intel_dp_is_uhbr(crtc_state)) {

		dp_tp_ctl |= DP_TP_CTL_MODE_MST;

	} else {

		dp_tp_ctl |= DP_TP_CTL_MODE_SST;