Commit 01a08fd9 authored by Gary Yang's avatar Gary Yang Committed by Peter Chen
Browse files

dt-bindings: arm: cix: add OrangePi 6 Plus board 



OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
processor + NPU processor,integrated graphics processor, equipped with
16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
and high-capacity storage

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: default avatarGary Yang <gary.yang@cixtech.com>
Link: https://lore.kernel.org/r/20260110093406.2700505-2-gary.yang@cixtech.com


Signed-off-by: default avatarPeter Chen <peter.chen@cixtech.com>
parent 8f0b4cce

Documentation/devicetree/bindings/arm/cix.yaml

+4 −2
Original line number Diff line number Diff line
@@ -16,9 +16,11 @@ properties: 
  compatible:

    oneOf:



      - description: Radxa Orion O6

      - description: Sky1 based boards

        items:

          - const: radxa,orion-o6

          - enum:

              - radxa,orion-o6 # Radxa Orion O6 board

              - xunlong,orangepi-6-plus # Xunlong orangepi 6 plus board

          - const: cix,sky1



additionalProperties: true