Unverified Commit 01e3313e authored by Charlie Jenkins's avatar Charlie Jenkins Committed by Palmer Dabbelt
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riscv: Add xtheadvector instruction definitions



xtheadvector uses different encodings than standard vector for
vsetvli and vector loads/stores. Write the instruction formats to be
used in assembly code.

Co-developed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarCharlie Jenkins <charlie@rivosinc.com>
Tested-by: default avatarYangyu Chen <cyy@cyyself.name>
Link: https://lore.kernel.org/r/20241113-xtheadvector-v11-8-236c22791ef9@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent b9a93144
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+25 −0
Original line number Diff line number Diff line
@@ -19,4 +19,29 @@ void disable_xtheadvector(void);
static inline void disable_xtheadvector(void) { }
#endif

/* Extension specific helpers */

/*
 * Vector 0.7.1 as used for example on T-Head Xuantie cores, uses an older
 * encoding for vsetvli (ta, ma vs. d1), so provide an instruction for
 * vsetvli	t4, x0, e8, m8, d1
 */
#define THEAD_VSETVLI_T4X0E8M8D1	".long	0x00307ed7\n\t"

/*
 * While in theory, the vector-0.7.1 vsb.v and vlb.v result in the same
 * encoding as the standard vse8.v and vle8.v, compilers seem to optimize
 * the call resulting in a different encoding and then using a value for
 * the "mop" field that is not part of vector-0.7.1
 * So encode specific variants for vstate_save and _restore.
 */
#define THEAD_VSB_V_V0T0		".long	0x02028027\n\t"
#define THEAD_VSB_V_V8T0		".long	0x02028427\n\t"
#define THEAD_VSB_V_V16T0		".long	0x02028827\n\t"
#define THEAD_VSB_V_V24T0		".long	0x02028c27\n\t"
#define THEAD_VLB_V_V0T0		".long	0x012028007\n\t"
#define THEAD_VLB_V_V8T0		".long	0x012028407\n\t"
#define THEAD_VLB_V_V16T0		".long	0x012028807\n\t"
#define THEAD_VLB_V_V24T0		".long	0x012028c07\n\t"

#endif