Commit 01f96b81 authored by Mao Jinlong's avatar Mao Jinlong Committed by Suzuki K Poulose
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coresight: Add label sysfs node support



For some coresight components like CTI and TPDM, there could be
numerous of them. From the node name, we can only get the type and
register address of the component. We can't identify the HW or the
system the component belongs to. Add label sysfs node support for
showing the intuitive name of the device.

Signed-off-by: default avatarMao Jinlong <quic_jinlmao@quicinc.com>
Reviewed-by: default avatarMike Leach <mike.leach@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250816072529.3716968-3-quic_jinlmao@quicinc.com
parent 1ad38ef4
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+6 −0
Original line number Diff line number Diff line
@@ -239,3 +239,9 @@ Date: March 2020
KernelVersion:	5.7
Contact:	Mike Leach or Mathieu Poirier
Description:	(Write) Clear all channel / trigger programming.

What:           /sys/bus/coresight/devices/<cti-name>/label
Date:           Aug 2025
KernelVersion   6.18
Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
Description:    (Read) Show hardware context information of device.
+6 −0
Original line number Diff line number Diff line
@@ -13,3 +13,9 @@ KernelVersion: 6.14
Contact:	Mao Jinlong <quic_jinlmao@quicinc.com>
Description:	(R) Show the trace ID that will appear in the trace stream
		coming from this trace entity.

What:           /sys/bus/coresight/devices/dummy_source<N>/label
Date:           Aug 2025
KernelVersion   6.18
Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
Description:    (Read) Show hardware context information of device.
+6 −0
Original line number Diff line number Diff line
@@ -19,6 +19,12 @@ Description: (RW) Disables write access to the Trace RAM by stopping the
		into the Trace RAM following the trigger event is equal to the
		value stored in this register+1 (from ARM ETB-TRM).

What:           /sys/bus/coresight/devices/<memory_map>.etb/label
Date:           Aug 2025
KernelVersion   6.18
Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
Description:    (Read) Show hardware context information of device.

What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp
Date:		March 2016
KernelVersion:	4.7
+6 −0
Original line number Diff line number Diff line
@@ -251,6 +251,12 @@ KernelVersion: 4.4
Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
Description:	(RO) Holds the cpu number this tracer is affined to.

What:           /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/label
Date:           Aug 2025
KernelVersion   6.18
Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
Description:    (Read) Show hardware context information of device.

What:		/sys/bus/coresight/devices/<memory_map>.[etm|ptm]/mgmt/etmccr
Date:		September 2015
KernelVersion:	4.4
+6 −0
Original line number Diff line number Diff line
@@ -329,6 +329,12 @@ Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description:	(RW) Access the selected single show PE comparator control
		register.

What:           /sys/bus/coresight/devices/etm<N>/label
Date:           Aug 2025
KernelVersion   6.18
Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
Description:    (Read) Show hardware context information of device.

What:		/sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr
Date:		April 2015
KernelVersion:	4.01
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