Commit 02168183 authored by Qiuxu Zhuo's avatar Qiuxu Zhuo Committed by Borislav Petkov (AMD)
Browse files

ie31200/EDAC: Add Intel Bartlett Lake-S SoCs support 



Bartlett Lake-S is a derivative of Raptor Lake-S and is optimized for
IoT/Edge applications. It shares the same memory controller registers
as Raptor Lake-S. Add compute die IDs of Bartlett Lake-S and reuse the
configuration data of Raptor Lake-S for Bartlett Lake-S EDAC support.

Signed-off-by: default avatarQiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20250502013900.343430-1-qiuxu.zhuo@intel.com
parent 86731a2a

drivers/edac/ie31200_edac.c

+22 −0
Original line number Diff line number Diff line
@@ -95,6 +95,18 @@ 
/* Alder Lake-S */

#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660



/* Bartlett Lake-S */

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_1	0x4639

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_2	0x463c

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_3	0x4642

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_4	0x4643

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_5	0xa731

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_6	0xa732

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_7	0xa733

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_8	0xa741

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_9	0xa744

#define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_10	0xa745



#define IE31200_RANKS_PER_CHANNEL	8

#define IE31200_DIMMS_PER_CHANNEL	2

#define IE31200_CHANNELS		2
@@ -741,6 +753,16 @@ static const struct pci_device_id ie31200_pci_tbl[] = { 
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_3), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_4), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_1), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_2), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_3), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_4), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_5), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_6), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_7), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_8), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_9), (kernel_ulong_t)&rpl_s_cfg},

	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_10), (kernel_ulong_t)&rpl_s_cfg},

	{ 0, } /* 0 terminated list. */

};

MODULE_DEVICE_TABLE(pci, ie31200_pci_tbl);