Commit 023f3290 authored by Uros Bizjak's avatar Uros Bizjak Committed by Ingo Molnar
Browse files

x86/locking: Remove semicolon from "lock" prefix 



Minimum version of binutils required to compile the kernel is 2.25.
This version correctly handles the "lock" prefix, so it is possible
to remove the semicolon, which was used to support ancient versions
of GNU as.

Due to the semicolon, the compiler considers "lock; insn" as two
separate instructions. Removing the semicolon makes asm length
calculations more accurate, consequently making scheduling and
inlining decisions of the compiler more accurate.

Removing the semicolon also enables assembler checks involving lock
prefix. Trying to assemble e.g. "lock andl %eax, %ebx" results in:

  Error: expecting lockable instruction after `lock'

Signed-off-by: default avatarUros Bizjak <ubizjak@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20250228085149.2478245-1-ubizjak@gmail.com
parent 337369f8

arch/x86/include/asm/alternative.h

+1 −1
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@ 
		".popsection\n"				\

		"671:"



#define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; "

#define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock "



#else /* ! CONFIG_SMP */

#define LOCK_PREFIX_HERE ""

arch/x86/include/asm/barrier.h

+4 −4
Original line number Diff line number Diff line
@@ -12,11 +12,11 @@ 
 */



#ifdef CONFIG_X86_32

#define mb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "mfence", \

#define mb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "mfence", \

				      X86_FEATURE_XMM2) ::: "memory", "cc")

#define rmb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "lfence", \

#define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence", \

				       X86_FEATURE_XMM2) ::: "memory", "cc")

#define wmb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "sfence", \

#define wmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "sfence", \

				       X86_FEATURE_XMM2) ::: "memory", "cc")

#else

#define __mb()	asm volatile("mfence":::"memory")
@@ -50,7 +50,7 @@ 
#define __dma_rmb()	barrier()

#define __dma_wmb()	barrier()



#define __smp_mb()	asm volatile("lock; addl $0,-4(%%" _ASM_SP ")" ::: "memory", "cc")

#define __smp_mb()	asm volatile("lock addl $0,-4(%%" _ASM_SP ")" ::: "memory", "cc")



#define __smp_rmb()	dma_rmb()

#define __smp_wmb()	barrier()

arch/x86/include/asm/cmpxchg.h

+2 −2
Original line number Diff line number Diff line
@@ -134,7 +134,7 @@ extern void __add_wrong_size(void) 
	__raw_cmpxchg((ptr), (old), (new), (size), LOCK_PREFIX)



#define __sync_cmpxchg(ptr, old, new, size)				\

	__raw_cmpxchg((ptr), (old), (new), (size), "lock; ")

	__raw_cmpxchg((ptr), (old), (new), (size), "lock ")



#define __cmpxchg_local(ptr, old, new, size)				\

	__raw_cmpxchg((ptr), (old), (new), (size), "")
@@ -222,7 +222,7 @@ extern void __add_wrong_size(void) 
	__raw_try_cmpxchg((ptr), (pold), (new), (size), LOCK_PREFIX)



#define __sync_try_cmpxchg(ptr, pold, new, size)			\

	__raw_try_cmpxchg((ptr), (pold), (new), (size), "lock; ")

	__raw_try_cmpxchg((ptr), (pold), (new), (size), "lock ")



#define __try_cmpxchg_local(ptr, pold, new, size)			\

	__raw_try_cmpxchg((ptr), (pold), (new), (size), "")

arch/x86/include/asm/cmpxchg_32.h

+2 −2
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, 


static __always_inline u64 arch_cmpxchg64(volatile u64 *ptr, u64 old, u64 new)

{

	return __arch_cmpxchg64_emu(ptr, old, new, LOCK_PREFIX_HERE, "lock; ");

	return __arch_cmpxchg64_emu(ptr, old, new, LOCK_PREFIX_HERE, "lock ");

}

#define arch_cmpxchg64 arch_cmpxchg64
@@ -140,7 +140,7 @@ static __always_inline u64 arch_cmpxchg64_local(volatile u64 *ptr, u64 old, u64 


static __always_inline bool arch_try_cmpxchg64(volatile u64 *ptr, u64 *oldp, u64 new)

{

	return __arch_try_cmpxchg64_emu(ptr, oldp, new, LOCK_PREFIX_HERE, "lock; ");

	return __arch_try_cmpxchg64_emu(ptr, oldp, new, LOCK_PREFIX_HERE, "lock ");

}

#define arch_try_cmpxchg64 arch_try_cmpxchg64

arch/x86/include/asm/edac.h

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ static inline void edac_atomic_scrub(void *va, u32 size) 
	 * are interrupt, DMA and SMP safe.

	 */

	for (i = 0; i < size / 4; i++, virt_addr++)

		asm volatile("lock; addl $0, %0"::"m" (*virt_addr));

		asm volatile("lock addl $0, %0"::"m" (*virt_addr));

}



#endif /* _ASM_X86_EDAC_H */