Commit 029faefb authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
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drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2



SDMA_CNTL is not set in some cases, driver configures it by itself.

v2: simplify code

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent af8999c5
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+3 −13
Original line number Diff line number Diff line
@@ -1602,19 +1602,9 @@ static int sdma_v4_4_2_set_ecc_irq_state(struct amdgpu_device *adev,
	u32 sdma_cntl;

	sdma_cntl = RREG32_SDMA(type, regSDMA_CNTL);
	switch (state) {
	case AMDGPU_IRQ_STATE_DISABLE:
		sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL,
					  DRAM_ECC_INT_ENABLE, 0);
	sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, DRAM_ECC_INT_ENABLE,
					state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0);
	WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
		break;
	/* sdma ecc interrupt is enabled by default
	 * driver doesn't need to do anything to
	 * enable the interrupt */
	case AMDGPU_IRQ_STATE_ENABLE:
	default:
		break;
	}

	return 0;
}