Commit 02d4df78 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-core-2024-03-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq updates from Thomas Gleixner:
 "Core:

   - Make affinity changes take effect immediately for interrupt
     threads. This reduces the impact on isolated CPUs as it pulls over
     the thread right away instead of doing it after the next hardware
     interrupt arrived.

   - Cleanup and improvements for the interrupt chip simulator

   - Deduplication of the interrupt descriptor initialization code so
     the sparse and non-sparse mode share more code.

  Drivers:

   - A set of conversions to platform_drivers::remove_new() which gets
     rid of the pointless return value.

   - A new driver for the Starfive JH8100 SoC

   - Support for Amlogic-T7 SoCs

   - Improvement for the interrupt handling and EOI management for the
     loongson interrupt controller.

   - The usual fixes and improvements all over the place"

* tag 'irq-core-2024-03-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (33 commits)
  irqchip/ts4800: Convert to platform_driver::remove_new() callback
  irqchip/stm32-exti: Convert to platform_driver::remove_new() callback
  irqchip/renesas-rza1: Convert to platform_driver::remove_new() callback
  irqchip/renesas-irqc: Convert to platform_driver::remove_new() callback
  irqchip/renesas-intc-irqpin: Convert to platform_driver::remove_new() callback
  irqchip/pruss-intc: Convert to platform_driver::remove_new() callback
  irqchip/mvebu-pic: Convert to platform_driver::remove_new() callback
  irqchip/madera: Convert to platform_driver::remove_new() callback
  irqchip/ls-scfg-msi: Convert to platform_driver::remove_new() callback
  irqchip/keystone: Convert to platform_driver::remove_new() callback
  irqchip/imx-irqsteer: Convert to platform_driver::remove_new() callback
  irqchip/imx-intmux: Convert to platform_driver::remove_new() callback
  irqchip/imgpdc: Convert to platform_driver::remove_new() callback
  irqchip: Add StarFive external interrupt controller
  dt-bindings: interrupt-controller: Add starfive,jh8100-intc
  arm64: dts: Add gpio_intc node for Amlogic-T7 SoCs
  irqchip/meson-gpio: Add support for Amlogic-T7 SoCs
  dt-bindings: interrupt-controller: Add support for Amlogic-T7 SoCs
  irqchip/vic: Fix a kernel-doc warning
  genirq: Wake interrupt threads immediately when changing affinity
  ...
parents 045395d8 f7f56d59

Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml

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@@ -36,6 +36,7 @@ properties: 
              - amlogic,meson-a1-gpio-intc

              - amlogic,meson-s4-gpio-intc

              - amlogic,c3-gpio-intc

              - amlogic,t7-gpio-intc

          - const: amlogic,meson-gpio-intc



  reg:

Documentation/devicetree/bindings/interrupt-controller/starfive,jh8100-intc.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/starfive,jh8100-intc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: StarFive External Interrupt Controller



description:

  StarFive SoC JH8100 contain a external interrupt controller. It can be used

  to handle high-level input interrupt signals. It also send the output

  interrupt signal to RISC-V PLIC.



maintainers:

  - Changhuang Liang <changhuang.liang@starfivetech.com>



properties:

  compatible:

    const: starfive,jh8100-intc



  reg:

    maxItems: 1



  clocks:

    description: APB clock for the interrupt controller

    maxItems: 1



  resets:

    description: APB reset for the interrupt controller

    maxItems: 1



  interrupts:

    maxItems: 1



  interrupt-controller: true



  "#interrupt-cells":

    const: 1



required:

  - compatible

  - reg

  - clocks

  - resets

  - interrupts

  - interrupt-controller

  - "#interrupt-cells"



additionalProperties: false



examples:

  - |

    interrupt-controller@12260000 {

      compatible = "starfive,jh8100-intc";

      reg = <0x12260000 0x10000>;

      clocks = <&syscrg_ne 76>;

      resets = <&syscrg_ne 13>;

      interrupts = <45>;

      interrupt-controller;

      #interrupt-cells = <1>;

    };

MAINTAINERS

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@@ -20952,6 +20952,12 @@ F: Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml 
F:	drivers/phy/starfive/phy-jh7110-pcie.c

F:	drivers/phy/starfive/phy-jh7110-usb.c









STARFIVE JH8100 EXTERNAL INTERRUPT CONTROLLER DRIVER









M:	Changhuang Liang <changhuang.liang@starfivetech.com>









S:	Supported









F:	Documentation/devicetree/bindings/interrupt-controller/starfive,jh8100-intc.yaml









F:	drivers/irqchip/irq-starfive-jh8100-intc.c

















STATIC BRANCH/CALL









M:	Peter Zijlstra <peterz@infradead.org>









M:	Josh Poimboeuf <jpoimboe@kernel.org>

























arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi



+10
−0






























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@@ -171,6 +171,16 @@ gpio: bank@4000 {







				};









			};



















			gpio_intc: interrupt-controller@4080 {









				compatible = "amlogic,t7-gpio-intc",









					     "amlogic,meson-gpio-intc";









				reg = <0x0 0x4080 0x0 0x20>;









				interrupt-controller;









				#interrupt-cells = <2>;









				amlogic,channel-interrupts =









					<10 11 12 13 14 15 16 17 18 19 20 21>;









			};



















			uart_a: serial@78000 {









				compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart";









				reg = <0x0 0x78000 0x0 0x18>;
































drivers/irqchip/Kconfig



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−0






























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@@ -546,6 +546,17 @@ config SIFIVE_PLIC







	select IRQ_DOMAIN_HIERARCHY









	select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP



















config STARFIVE_JH8100_INTC









	bool "StarFive JH8100 External Interrupt Controller"









	depends on ARCH_STARFIVE || COMPILE_TEST









	default ARCH_STARFIVE









	select IRQ_DOMAIN_HIERARCHY









	help









	  This enables support for the INTC chip found in StarFive JH8100









	  SoC.



















	  If you don't know what to do here, say Y.



















config EXYNOS_IRQ_COMBINER









	bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST









	depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST