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Some of the SDCA Controls have a defined reset value in the specification. Update the parsing to add these specification defined values into the regmap defaults array. This will reduce the number of registers that are synchronised on a cache sync. Signed-off-by:Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20260204125944.1134011-6-ckeepax@opensource.cirrus.com Reviewed-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.dev> Signed-off-by:
Mark Brown <broonie@kernel.org>