Commit 0325143b authored by Vitaly Lifshits's avatar Vitaly Lifshits Committed by Tony Nguyen
Browse files

igc: disable L1.2 PCI-E link substate to avoid performance issue

I226 devices advertise support for the PCI-E link L1.2 substate. However,
due to a hardware limitation, the exit latency from this low-power state
is longer than the packet buffer can tolerate under high traffic
conditions. This can lead to packet loss and degraded performance.

To mitigate this, disable the L1.2 substate. The increased power draw
between L1.1 and L1.2 is insignificant.

Fixes: 43546211 ("igc: Add new device ID's")
Link: https://lore.kernel.org/intel-wired-lan/15248b4f-3271-42dd-8e35-02bfc92b25e1@intel.com


Signed-off-by: default avatarVitaly Lifshits <vitaly.lifshits@intel.com>
Reviewed-by: default avatarAleksandr Loktionov <aleksandr.loktionov@intel.com>
Tested-by: default avatarMor Bar-Gabay <morx.bar.gabay@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent b2beb5bb
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+10 −0
Original line number Diff line number Diff line
@@ -7115,6 +7115,10 @@ static int igc_probe(struct pci_dev *pdev,
	adapter->port_num = hw->bus.func;
	adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);

	/* Disable ASPM L1.2 on I226 devices to avoid packet loss */
	if (igc_is_device_id_i226(hw))
		pci_disable_link_state(pdev, PCIE_LINK_STATE_L1_2);

	err = pci_save_state(pdev);
	if (err)
		goto err_ioremap;
@@ -7500,6 +7504,9 @@ static int __igc_resume(struct device *dev, bool rpm)
	pci_enable_wake(pdev, PCI_D3hot, 0);
	pci_enable_wake(pdev, PCI_D3cold, 0);

	if (igc_is_device_id_i226(hw))
		pci_disable_link_state(pdev, PCIE_LINK_STATE_L1_2);

	if (igc_init_interrupt_scheme(adapter, true)) {
		netdev_err(netdev, "Unable to allocate memory for queues\n");
		return -ENOMEM;
@@ -7625,6 +7632,9 @@ static pci_ers_result_t igc_io_slot_reset(struct pci_dev *pdev)
		pci_enable_wake(pdev, PCI_D3hot, 0);
		pci_enable_wake(pdev, PCI_D3cold, 0);

		if (igc_is_device_id_i226(hw))
			pci_disable_link_state_locked(pdev, PCIE_LINK_STATE_L1_2);

		/* In case of PCI error, adapter loses its HW address
		 * so we should re-assign it here.
		 */