Commit 0395cde0 authored by Frank Min's avatar Frank Min Committed by Alex Deucher
Browse files

drm/amdgpu: add kicker fws loading for gfx12/smu14/psp14 



1. Add kicker firmwares loading for gfx12/smu14/psp14
2. Register additional MODULE_FIRMWARE entries for kicker fws
   - gc_12_0_1_rlc_kicker.bin
   - gc_12_0_1_imu_kicker.bin
   - psp_14_0_3_sos_kicker.bin
   - psp_14_0_3_ta_kicker.bin
   - smu_14_0_3_kicker.bin

Signed-off-by: default avatarFrank Min <Frank.Min@amd.com>
Reviewed-by: default avatarGui Chengming <Jack.Gui@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 8e0d1edb

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 


static const struct kicker_device kicker_device_list[] = {

	{0x744B, 0x00},

	{0x7551, 0xC8}

};



static void amdgpu_ucode_print_common_hdr(const struct common_firmware_header *hdr)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

+10 −4
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@ MODULE_FIRMWARE("amdgpu/gc_12_0_1_pfp.bin"); 
MODULE_FIRMWARE("amdgpu/gc_12_0_1_me.bin");

MODULE_FIRMWARE("amdgpu/gc_12_0_1_mec.bin");

MODULE_FIRMWARE("amdgpu/gc_12_0_1_rlc.bin");

MODULE_FIRMWARE("amdgpu/gc_12_0_1_rlc_kicker.bin");

MODULE_FIRMWARE("amdgpu/gc_12_0_1_toc.bin");



static const struct amdgpu_hwip_reg_entry gc_reg_list_12_0[] = {
@@ -586,7 +587,7 @@ static int gfx_v12_0_init_toc_microcode(struct amdgpu_device *adev, const char * 


static int gfx_v12_0_init_microcode(struct amdgpu_device *adev)

{

	char ucode_prefix[15];

	char ucode_prefix[30];

	int err;

	const struct rlc_firmware_header_v2_0 *rlc_hdr;

	uint16_t version_major;
@@ -613,6 +614,11 @@ static int gfx_v12_0_init_microcode(struct amdgpu_device *adev) 
	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_ME_P0_STACK);



	if (!amdgpu_sriov_vf(adev)) {

		if (amdgpu_is_kicker_fw(adev))

			err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,

						   AMDGPU_UCODE_REQUIRED,

						   "amdgpu/%s_rlc_kicker.bin", ucode_prefix);

		else

			err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,

						   AMDGPU_UCODE_REQUIRED,

						   "amdgpu/%s_rlc.bin", ucode_prefix);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

+8 −3
Original line number Diff line number Diff line
@@ -34,12 +34,13 @@ 


MODULE_FIRMWARE("amdgpu/gc_12_0_0_imu.bin");

MODULE_FIRMWARE("amdgpu/gc_12_0_1_imu.bin");

MODULE_FIRMWARE("amdgpu/gc_12_0_1_imu_kicker.bin");



#define TRANSFER_RAM_MASK	0x001c0000



static int imu_v12_0_init_microcode(struct amdgpu_device *adev)

{

	char ucode_prefix[15];

	char ucode_prefix[30];

	int err;

	const struct imu_firmware_header_v1_0 *imu_hdr;

	struct amdgpu_firmware_info *info = NULL;
@@ -47,6 +48,10 @@ static int imu_v12_0_init_microcode(struct amdgpu_device *adev) 
	DRM_DEBUG("\n");



	amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));

	if (amdgpu_is_kicker_fw(adev))

		err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, AMDGPU_UCODE_REQUIRED,

					   "amdgpu/%s_imu_kicker.bin", ucode_prefix);

	else

		err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, AMDGPU_UCODE_REQUIRED,

					   "amdgpu/%s_imu.bin", ucode_prefix);

	if (err)

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

+2 −0
Original line number Diff line number Diff line
@@ -34,7 +34,9 @@ 
MODULE_FIRMWARE("amdgpu/psp_14_0_2_sos.bin");

MODULE_FIRMWARE("amdgpu/psp_14_0_2_ta.bin");

MODULE_FIRMWARE("amdgpu/psp_14_0_3_sos.bin");

MODULE_FIRMWARE("amdgpu/psp_14_0_3_sos_kicker.bin");

MODULE_FIRMWARE("amdgpu/psp_14_0_3_ta.bin");

MODULE_FIRMWARE("amdgpu/psp_14_0_3_ta_kicker.bin");

MODULE_FIRMWARE("amdgpu/psp_14_0_5_toc.bin");

MODULE_FIRMWARE("amdgpu/psp_14_0_5_ta.bin");

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

+8 −3
Original line number Diff line number Diff line
@@ -62,13 +62,14 @@ const int decoded_link_width[8] = {0, 1, 2, 4, 8, 12, 16, 32}; 


MODULE_FIRMWARE("amdgpu/smu_14_0_2.bin");

MODULE_FIRMWARE("amdgpu/smu_14_0_3.bin");

MODULE_FIRMWARE("amdgpu/smu_14_0_3_kicker.bin");



#define ENABLE_IMU_ARG_GFXOFF_ENABLE		1



int smu_v14_0_init_microcode(struct smu_context *smu)

{

	struct amdgpu_device *adev = smu->adev;

	char ucode_prefix[15];

	char ucode_prefix[30];

	int err = 0;

	const struct smc_firmware_header_v1_0 *hdr;

	const struct common_firmware_header *header;
@@ -79,6 +80,10 @@ int smu_v14_0_init_microcode(struct smu_context *smu) 
		return 0;



	amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));

	if (amdgpu_is_kicker_fw(adev))

		err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,

					   "amdgpu/%s_kicker.bin", ucode_prefix);

	else

		err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,

					   "amdgpu/%s.bin", ucode_prefix);

	if (err)