Unverified Commit 03966594 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Palmer Dabbelt
Browse files

riscv: remove riscv_isa_ext_keys[] array and related usage 



All users have switched to riscv_has_extension_*, remove unused
definitions, vars and related setting code.

Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarGuo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20230128172856.3814-14-jszhang@kernel.org


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent e8ad17d2

arch/riscv/include/asm/hwcap.h

+0 −32
Original line number Diff line number Diff line
@@ -61,20 +61,6 @@ enum { 


extern unsigned long elf_hwcap;





/*

 * This enum represents the logical ID for each RISC-V ISA extension static

 * keys. We can use static key to optimize code path if some ISA extensions

 * are available.

 * Entries are sorted alphabetically.

 */

enum riscv_isa_ext_key {

	RISCV_ISA_EXT_KEY_FPU,		/* For 'F' and 'D' */

	RISCV_ISA_EXT_KEY_SVINVAL,

	RISCV_ISA_EXT_KEY_ZIHINTPAUSE,

	RISCV_ISA_EXT_KEY_MAX,

};



struct riscv_isa_ext_data {

	/* Name of the extension displayed to userspace via /proc/cpuinfo */

	char uprop[RISCV_ISA_EXT_NAME_LEN_MAX];
@@ -82,24 +68,6 @@ struct riscv_isa_ext_data { 
	unsigned int isa_ext_id;

};



extern struct static_key_false riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_MAX];



static __always_inline int riscv_isa_ext2key(int num)

{

	switch (num) {

	case RISCV_ISA_EXT_f:

		return RISCV_ISA_EXT_KEY_FPU;

	case RISCV_ISA_EXT_d:

		return RISCV_ISA_EXT_KEY_FPU;

	case RISCV_ISA_EXT_SVINVAL:

		return RISCV_ISA_EXT_KEY_SVINVAL;

	case RISCV_ISA_EXT_ZIHINTPAUSE:

		return RISCV_ISA_EXT_KEY_ZIHINTPAUSE;

	default:

		return -EINVAL;

	}

}



static __always_inline bool

riscv_has_extension_likely(const unsigned long ext)

{

arch/riscv/kernel/cpufeature.c

+0 −9
Original line number Diff line number Diff line
@@ -29,9 +29,6 @@ unsigned long elf_hwcap __read_mostly; 
/* Host ISA bitmap */

static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly;



DEFINE_STATIC_KEY_ARRAY_FALSE(riscv_isa_ext_keys, RISCV_ISA_EXT_KEY_MAX);

EXPORT_SYMBOL(riscv_isa_ext_keys);



/**

 * riscv_isa_extension_base() - Get base extension word

 *
@@ -267,12 +264,6 @@ void __init riscv_fill_hwcap(void) 
		if (elf_hwcap & BIT_MASK(i))

			print_str[j++] = (char)('a' + i);

	pr_info("riscv: ELF capabilities %s\n", print_str);



	for_each_set_bit(i, riscv_isa, RISCV_ISA_EXT_MAX) {

		j = riscv_isa_ext2key(i);

		if (j >= 0)

			static_branch_enable(&riscv_isa_ext_keys[j]);

	}

}



#ifdef CONFIG_RISCV_ALTERNATIVE