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This controller's input and output logic is similar to previous generations of SoCs. Additionally, it's capable of interrupt masking, and could be configured to detect levels and edges, and is supplied with a distinct reset signal. The interrupt functionality is implemented through an irqchip, whose operations are written with previous generation SoCs in mind and could be reused. Since all Loongson SoCs with similar interrupt capability (LS2K1500, LS2K2000) support byte-control mode, these operations are for byte-control mode only for simplicity. Signed-off-by:Yao Zi <ziyao@disroot.org> Reviewed-by:
Huacai Chen <chenhuacai@loongson.cn> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250904013438.2405-3-ziyao@disroot.org Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>