Commit 03c8a3c7 authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Shawn Guo
Browse files

ARM: dts: imx6dl-prtmvt: configure ethernet reference clock parent 



On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 88718564

arch/arm/boot/dts/imx6dl-prtmvt.dts

+5 −6
Original line number Diff line number Diff line
@@ -193,6 +193,7 @@ clk50m_phy: phy-clock { 
		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <50000000>;

		clock-output-names = "enet_ref_pad";

	};



	reg_1v8: regulator-1v8 {
@@ -293,8 +294,10 @@ &can2 { 
};



&clks {

	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;

	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;

	clocks = <&clk50m_phy>;

	clock-names = "enet_ref_pad";

	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_ENET_REF_SEL>;

	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clk50m_phy>;

};



&ecspi1 {
@@ -314,10 +317,6 @@ &fec { 
	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "rmii";

	clocks = <&clks IMX6QDL_CLK_ENET>,

		 <&clks IMX6QDL_CLK_ENET>,

		 <&clk50m_phy>;

	clock-names = "ipg", "ahb", "ptp";

	phy-handle = <&rmii_phy>;

	status = "okay";