Commit 03ebae19 authored by Yevgeny Kliteynik's avatar Yevgeny Kliteynik Committed by Paolo Abeni
Browse files

net/mlx5: DR, use the right action structs for STEv3 



Some actions in ConnectX-8 (STEv3) have different structure,
and they are handled separately in ste_ctx_v3.
This separate handling was missing two actions: INSERT_HDR
and REMOVE_HDR, which broke SWS for Linux Bridge.
This patch resolves the issue by introducing dedicated
callbacks for the insert and remove header functions,
with version-specific implementations for each STE variant.

Fixes: 4d617b57 ("net/mlx5: DR, add support for ConnectX-8 steering")
Signed-off-by: default avatarYevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: default avatarItamar Gozlan <igozlan@nvidia.com>
Reviewed-by: default avatarMark Bloch <mbloch@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1741644104-97767-2-git-send-email-tariqt@nvidia.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 1063ae07

drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h

+4 −0
Original line number Diff line number Diff line
@@ -210,6 +210,10 @@ struct mlx5dr_ste_ctx { 
	void (*set_encap_l3)(u8 *hw_ste_p, u8 *frst_s_action,

			     u8 *scnd_d_action, u32 reformat_id,

			     int size);

	void (*set_insert_hdr)(u8 *hw_ste_p, u8 *d_action, u32 reformat_id,

			       u8 anchor, u8 offset, int size);

	void (*set_remove_hdr)(u8 *hw_ste_p, u8 *s_action, u8 anchor,

			       u8 offset, int size);

	/* Send */

	void (*prepare_for_postsend)(u8 *hw_ste_p, u32 ste_size);

};

drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c

+27 −25
Original line number Diff line number Diff line
@@ -266,7 +266,7 @@ void dr_ste_v1_set_encap(u8 *hw_ste_p, u8 *d_action, u32 reformat_id, int size) 
	dr_ste_v1_set_reparse(hw_ste_p);

}



static void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,

void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,

			      u32 reformat_id,

			      u8 anchor, u8 offset,

			      int size)
@@ -286,7 +286,7 @@ static void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action, 
	dr_ste_v1_set_reparse(hw_ste_p);

}



static void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,

void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,

			      u8 anchor, u8 offset,

			      int size)

{
@@ -584,7 +584,7 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx, 
			action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);

			action_sz = DR_STE_ACTION_TRIPLE_SZ;

		}

		dr_ste_v1_set_insert_hdr(last_ste, action,

		ste_ctx->set_insert_hdr(last_ste, action,

					attr->reformat.id,

					attr->reformat.param_0,

					attr->reformat.param_1,
@@ -597,7 +597,7 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx, 
			action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);

			action_sz = DR_STE_ACTION_TRIPLE_SZ;

		}

		dr_ste_v1_set_remove_hdr(last_ste, action,

		ste_ctx->set_remove_hdr(last_ste, action,

					attr->reformat.param_0,

					attr->reformat.param_1,

					attr->reformat.size);
@@ -792,7 +792,7 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx, 
			action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);

			action_sz = DR_STE_ACTION_TRIPLE_SZ;

		}

		dr_ste_v1_set_insert_hdr(last_ste, action,

		ste_ctx->set_insert_hdr(last_ste, action,

					attr->reformat.id,

					attr->reformat.param_0,

					attr->reformat.param_1,
@@ -808,7 +808,7 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx, 
			allow_modify_hdr = true;

			allow_ctr = true;

		}

		dr_ste_v1_set_remove_hdr(last_ste, action,

		ste_ctx->set_remove_hdr(last_ste, action,

					attr->reformat.param_0,

					attr->reformat.param_1,

					attr->reformat.size);
@@ -2200,6 +2200,8 @@ static struct mlx5dr_ste_ctx ste_ctx_v1 = { 
	.set_pop_vlan			= &dr_ste_v1_set_pop_vlan,

	.set_rx_decap			= &dr_ste_v1_set_rx_decap,

	.set_encap_l3			= &dr_ste_v1_set_encap_l3,

	.set_insert_hdr			= &dr_ste_v1_set_insert_hdr,

	.set_remove_hdr			= &dr_ste_v1_set_remove_hdr,

	/* Send */

	.prepare_for_postsend		= &dr_ste_v1_prepare_for_postsend,

};

drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h

+4 −0
Original line number Diff line number Diff line
@@ -156,6 +156,10 @@ void dr_ste_v1_set_pop_vlan(u8 *hw_ste_p, u8 *s_action, u8 vlans_num); 
void dr_ste_v1_set_encap_l3(u8 *hw_ste_p, u8 *frst_s_action, u8 *scnd_d_action,

			    u32 reformat_id, int size);

void dr_ste_v1_set_rx_decap(u8 *hw_ste_p, u8 *s_action);

void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action, u32 reformat_id,

			      u8 anchor, u8 offset, int size);

void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action, u8 anchor,

			      u8 offset, int size);

void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_domain *dmn,

			      u8 *action_type_set, u32 actions_caps, u8 *last_ste,

			      struct mlx5dr_ste_actions_attr *attr, u32 *added_stes);

drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c

+2 −0
Original line number Diff line number Diff line
@@ -69,6 +69,8 @@ static struct mlx5dr_ste_ctx ste_ctx_v2 = { 
	.set_pop_vlan			= &dr_ste_v1_set_pop_vlan,

	.set_rx_decap			= &dr_ste_v1_set_rx_decap,

	.set_encap_l3			= &dr_ste_v1_set_encap_l3,

	.set_insert_hdr			= &dr_ste_v1_set_insert_hdr,

	.set_remove_hdr			= &dr_ste_v1_set_remove_hdr,

	/* Send */

	.prepare_for_postsend		= &dr_ste_v1_prepare_for_postsend,

};

drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c

+42 −0
Original line number Diff line number Diff line
@@ -79,6 +79,46 @@ static void dr_ste_v3_set_rx_decap(u8 *hw_ste_p, u8 *s_action) 
	dr_ste_v1_set_reparse(hw_ste_p);

}



static void dr_ste_v3_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,

				     u32 reformat_id, u8 anchor,

				     u8 offset, int size)

{

	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,

		 action_id, DR_STE_V1_ACTION_ID_INSERT_POINTER);

	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,

		 start_anchor, anchor);



	/* The hardware expects here size and offset in words (2 byte) */

	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,

		 size, size / 2);

	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,

		 start_offset, offset / 2);



	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,

		 pointer, reformat_id);

	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,

		 attributes, DR_STE_V1_ACTION_INSERT_PTR_ATTR_NONE);



	dr_ste_v1_set_reparse(hw_ste_p);

}



static void dr_ste_v3_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,

				     u8 anchor, u8 offset, int size)

{

	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,

		 action_id, DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);

	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,

		 start_anchor, anchor);



	/* The hardware expects here size and offset in words (2 byte) */

	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,

		 remove_size, size / 2);

	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,

		 start_offset, offset / 2);



	dr_ste_v1_set_reparse(hw_ste_p);

}



static int

dr_ste_v3_set_action_decap_l3_list(void *data, u32 data_sz,

				   u8 *hw_action, u32 hw_action_sz,
@@ -211,6 +251,8 @@ static struct mlx5dr_ste_ctx ste_ctx_v3 = { 
	.set_pop_vlan			= &dr_ste_v3_set_pop_vlan,

	.set_rx_decap			= &dr_ste_v3_set_rx_decap,

	.set_encap_l3			= &dr_ste_v3_set_encap_l3,

	.set_insert_hdr			= &dr_ste_v3_set_insert_hdr,

	.set_remove_hdr			= &dr_ste_v3_set_remove_hdr,

	/* Send */

	.prepare_for_postsend		= &dr_ste_v1_prepare_for_postsend,

};