Commit 041d61ad authored by Hermes Wu's avatar Hermes Wu Committed by Dmitry Baryshkov
Browse files

drm/bridge: it6505: add I2C functionality on AUX 



DisplayPort AUX protocol supports I2C transport which is capable of
reading EDID or supports MCCS.

In drm_dp_helper, drm_dp_i2c_xfer() packs I2C requests into a
sequence of AUX requests.
it6505_aux_i2c_operation() is implemented to match drm_dp_i2c_xfer()
operactions.
it6505_aux_i2c_transfer() adds I2C functionality
for it6505_aux_transfer().

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarHermes Wu <hermes.wu@ite.com.tw>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20241230-v7-upstream-v7-10-e0fdd4844703@ite.corp-partner.google.com
parent 9f9eef9e

drivers/gpu/drm/bridge/ite-it6505.c

+175 −2
Original line number Diff line number Diff line
@@ -268,6 +268,18 @@ 
#define REG_SSC_CTRL1 0x189

#define REG_SSC_CTRL2 0x18A



#define REG_AUX_USER_CTRL 0x190

#define EN_USER_AUX BIT(0)

#define USER_AUX_DONE BIT(1)

#define AUX_EVENT BIT(4)



#define REG_AUX_USER_DATA_REC 0x191

#define M_AUX_IN_REC   0xF0

#define M_AUX_OUT_REC  0x0F



#define REG_AUX_USER_REPLY 0x19A

#define REG_AUX_USER_RXB(n) (n + 0x19B)



#define RBR DP_LINK_BW_1_62

#define HBR DP_LINK_BW_2_7

#define HBR2 DP_LINK_BW_5_4
@@ -303,6 +315,8 @@ 
#define MAX_EQ_LEVEL 0x03

#define AUX_WAIT_TIMEOUT_MS 15

#define AUX_FIFO_MAX_SIZE 16

#define AUX_I2C_MAX_SIZE 4

#define AUX_I2C_DEFER_RETRY 4

#define PIXEL_CLK_DELAY 1

#define PIXEL_CLK_INVERSE 0

#define ADJUST_PHASE_THRESHOLD 80000
@@ -325,7 +339,12 @@ 
enum aux_cmd_type {

	CMD_AUX_NATIVE_READ = 0x0,

	CMD_AUX_NATIVE_WRITE = 0x5,

	CMD_AUX_GI2C_ADR = 0x08,

	CMD_AUX_GI2C_READ = 0x09,

	CMD_AUX_GI2C_WRITE = 0x0A,

	CMD_AUX_I2C_EDID_READ = 0xB,

	CMD_AUX_I2C_READ = 0x0D,

	CMD_AUX_I2C_WRITE = 0x0C,



	/* KSV read with AUX FIFO extend from CMD_AUX_NATIVE_READ*/

	CMD_AUX_GET_KSV_LIST = 0x10,
@@ -1107,6 +1126,161 @@ static ssize_t it6505_aux_do_transfer(struct it6505 *it6505, 
	return ret;

}



static bool it6505_aux_i2c_reply_defer(u8 reply)

{

	if (reply == DP_AUX_NATIVE_REPLY_DEFER || reply == DP_AUX_I2C_REPLY_DEFER)

		return true;

	return false;

}



static bool it6505_aux_i2c_reply_nack(u8 reply)

{

	if (reply == DP_AUX_NATIVE_REPLY_NACK || reply == DP_AUX_I2C_REPLY_NACK)

		return true;

	return false;

}



static int it6505_aux_i2c_wait(struct it6505 *it6505, u8 *reply)

{

	int err = 0;

	unsigned long timeout;

	struct device *dev = it6505->dev;



	timeout = jiffies + msecs_to_jiffies(AUX_WAIT_TIMEOUT_MS) + 1;



	do {

		if (it6505_read(it6505, REG_AUX_USER_CTRL) & AUX_EVENT)

			break;

		if (time_after(jiffies, timeout)) {

			dev_err(dev, "Timed out waiting AUX I2C, BUSY = %X\n",

				it6505_aux_op_finished(it6505));

			err = -ETIMEDOUT;

			goto end_aux_i2c_wait;

		}

		usleep_range(300, 800);

	} while (!it6505_aux_op_finished(it6505));



	*reply = it6505_read(it6505, REG_AUX_USER_REPLY) >> 4;



	if (*reply == 0)

		goto end_aux_i2c_wait;



	if (it6505_aux_i2c_reply_defer(*reply))

		err = -EBUSY;

	else if (it6505_aux_i2c_reply_nack(*reply))

		err = -ENXIO;



end_aux_i2c_wait:

	it6505_set_bits(it6505, REG_AUX_USER_CTRL, USER_AUX_DONE, USER_AUX_DONE);

	return err;

}



static int it6505_aux_i2c_readb(struct it6505 *it6505, u8 *buf, size_t size, u8 *reply)

{

	int ret, i;

	int retry;



	for (retry = 0; retry < AUX_I2C_DEFER_RETRY; retry++) {

		it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_READ);



		ret = it6505_aux_i2c_wait(it6505, reply);

		if (it6505_aux_i2c_reply_defer(*reply))

			continue;

		if (ret >= 0)

			break;

	}



	for (i = 0; i < size; i++)

		buf[i] = it6505_read(it6505, REG_AUX_USER_RXB(0 + i));



	return size;

}



static int it6505_aux_i2c_writeb(struct it6505 *it6505, u8 *buf, size_t size, u8 *reply)

{

	int i, ret;

	int retry;



	for (i = 0; i < size; i++)

		it6505_write(it6505, REG_AUX_OUT_DATA0 + i, buf[i]);



	for (retry = 0; retry < AUX_I2C_DEFER_RETRY; retry++) {

		it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_WRITE);



		ret = it6505_aux_i2c_wait(it6505, reply);

		if (it6505_aux_i2c_reply_defer(*reply))

			continue;

		if (ret >= 0)

			break;

	}

	return size;

}



static ssize_t it6505_aux_i2c_operation(struct it6505 *it6505,

					struct drm_dp_aux_msg *msg)

{

	int ret;

	ssize_t request_size, data_cnt = 0;

	u8 *buffer = msg->buffer;



	/* set AUX user mode */

	it6505_set_bits(it6505, REG_AUX_CTRL,

			AUX_USER_MODE | AUX_NO_SEGMENT_WR, AUX_USER_MODE);

	it6505_set_bits(it6505, REG_AUX_USER_CTRL, EN_USER_AUX, EN_USER_AUX);

	/* clear AUX FIFO */

	it6505_set_bits(it6505, REG_AUX_CTRL,

			AUX_EN_FIFO_READ | CLR_EDID_FIFO,

			AUX_EN_FIFO_READ | CLR_EDID_FIFO);



	it6505_set_bits(it6505, REG_AUX_CTRL,

			AUX_EN_FIFO_READ | CLR_EDID_FIFO, 0x00);



	it6505_write(it6505, REG_AUX_ADR_0_7, 0x00);

	it6505_write(it6505, REG_AUX_ADR_8_15, msg->address << 1);



	if (msg->size == 0) {

		/* IIC Start/STOP dummy write */

		it6505_write(it6505, REG_AUX_ADR_16_19, msg->request);

		it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_ADR);

		ret = it6505_aux_i2c_wait(it6505, &msg->reply);

		goto end_aux_i2c_transfer;

	}



	/* IIC data transfer */

	data_cnt = 0;

	do {

		request_size = min_t(ssize_t, msg->size - data_cnt, AUX_I2C_MAX_SIZE);

		it6505_write(it6505, REG_AUX_ADR_16_19,

			     msg->request | ((request_size - 1) << 4));

		if ((msg->request & DP_AUX_I2C_READ) == DP_AUX_I2C_READ)

			ret = it6505_aux_i2c_readb(it6505, &buffer[data_cnt],

						   request_size, &msg->reply);

		else

			ret = it6505_aux_i2c_writeb(it6505, &buffer[data_cnt],

						    request_size, &msg->reply);



		if (ret < 0)

			goto end_aux_i2c_transfer;



		data_cnt += request_size;

	} while (data_cnt < msg->size);

	ret = data_cnt;

end_aux_i2c_transfer:



	it6505_set_bits(it6505, REG_AUX_USER_CTRL, EN_USER_AUX, 0);

	it6505_set_bits(it6505, REG_AUX_CTRL, AUX_USER_MODE, 0);

	return ret;

}



static ssize_t it6505_aux_i2c_transfer(struct drm_dp_aux *aux,

				       struct drm_dp_aux_msg *msg)

{

	struct it6505 *it6505 = container_of(aux, struct it6505, aux);



	guard(mutex)(&it6505->aux_lock);

	return it6505_aux_i2c_operation(it6505, msg);

}



static ssize_t it6505_aux_transfer(struct drm_dp_aux *aux,

				   struct drm_dp_aux_msg *msg)

{
@@ -1116,9 +1290,8 @@ static ssize_t it6505_aux_transfer(struct drm_dp_aux *aux, 
	int ret;

	enum aux_cmd_reply reply;



	/* IT6505 doesn't support arbitrary I2C read / write. */

	if (is_i2c)

		return -EINVAL;

		return it6505_aux_i2c_transfer(aux, msg);



	switch (msg->request) {

	case DP_AUX_NATIVE_READ: