Commit 04305367 authored by Christian Marangi's avatar Christian Marangi Committed by Manivannan Sadhasivam
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PCI: mediatek: Convert bool to single quirks entry and bitmap 



To clean Mediatek SoC PCIe struct, convert all the bool to a bitmap and
use a single quirks to reference all the values. This permits cleaner
addition of new quirk without having to define a new bool in the struct.

Signed-off-by: default avatarChristian Marangi <ansuelsmth@gmail.com>
Signed-off-by: default avatarManivannan Sadhasivam <mani@kernel.org>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patch.msgid.link/20251020111121.31779-4-ansuelsmth@gmail.com
parent 6d55d5a7

drivers/pci/controller/pcie-mediatek.c

+20 −13
Original line number Diff line number Diff line
@@ -142,24 +142,32 @@ 


struct mtk_pcie_port;



/**

 * enum mtk_pcie_quirks - MTK PCIe quirks

 * @MTK_PCIE_FIX_CLASS_ID: host's class ID needed to be fixed

 * @MTK_PCIE_FIX_DEVICE_ID: host's device ID needed to be fixed

 * @MTK_PCIE_NO_MSI: Bridge has no MSI support, and relies on an external block

 */

enum mtk_pcie_quirks {

	MTK_PCIE_FIX_CLASS_ID = BIT(0),

	MTK_PCIE_FIX_DEVICE_ID = BIT(1),

	MTK_PCIE_NO_MSI = BIT(2),

};



/**

 * struct mtk_pcie_soc - differentiate between host generations

 * @need_fix_class_id: whether this host's class ID needed to be fixed or not

 * @need_fix_device_id: whether this host's device ID needed to be fixed or not

 * @no_msi: Bridge has no MSI support, and relies on an external block

 * @device_id: device ID which this host need to be fixed

 * @ops: pointer to configuration access functions

 * @startup: pointer to controller setting functions

 * @setup_irq: pointer to initialize IRQ functions

 * @quirks: PCIe device quirks.

 */

struct mtk_pcie_soc {

	bool need_fix_class_id;

	bool need_fix_device_id;

	bool no_msi;

	unsigned int device_id;

	struct pci_ops *ops;

	int (*startup)(struct mtk_pcie_port *port);

	int (*setup_irq)(struct mtk_pcie_port *port, struct device_node *node);

	enum mtk_pcie_quirks quirks;

};



/**
@@ -703,7 +711,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) 
	writel(val, port->base + PCIE_RST_CTRL);



	/* Set up vendor ID and class code */

	if (soc->need_fix_class_id) {

	if (soc->quirks & MTK_PCIE_FIX_CLASS_ID) {

		val = PCI_VENDOR_ID_MEDIATEK;

		writew(val, port->base + PCIE_CONF_VEND_ID);
@@ -711,7 +719,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) 
		writew(val, port->base + PCIE_CONF_CLASS_ID);

	}



	if (soc->need_fix_device_id)

	if (soc->quirks & MTK_PCIE_FIX_DEVICE_ID)

		writew(soc->device_id, port->base + PCIE_CONF_DEVICE_ID);



	/* 100ms timeout value should be enough for Gen1/2 training */
@@ -1099,7 +1107,7 @@ static int mtk_pcie_probe(struct platform_device *pdev) 


	host->ops = pcie->soc->ops;

	host->sysdata = pcie;

	host->msi_domain = pcie->soc->no_msi;

	host->msi_domain = !!(pcie->soc->quirks & MTK_PCIE_NO_MSI);



	err = pci_host_probe(host);

	if (err)
@@ -1187,9 +1195,9 @@ static const struct dev_pm_ops mtk_pcie_pm_ops = { 
};



static const struct mtk_pcie_soc mtk_pcie_soc_v1 = {

	.no_msi = true,

	.ops = &mtk_pcie_ops,

	.startup = mtk_pcie_startup_port,

	.quirks = MTK_PCIE_NO_MSI,

};



static const struct mtk_pcie_soc mtk_pcie_soc_mt2712 = {
@@ -1199,19 +1207,18 @@ static const struct mtk_pcie_soc mtk_pcie_soc_mt2712 = { 
};



static const struct mtk_pcie_soc mtk_pcie_soc_mt7622 = {

	.need_fix_class_id = true,

	.ops = &mtk_pcie_ops_v2,

	.startup = mtk_pcie_startup_port_v2,

	.setup_irq = mtk_pcie_setup_irq,

	.quirks = MTK_PCIE_FIX_CLASS_ID,

};



static const struct mtk_pcie_soc mtk_pcie_soc_mt7629 = {

	.need_fix_class_id = true,

	.need_fix_device_id = true,

	.device_id = PCI_DEVICE_ID_MEDIATEK_7629,

	.ops = &mtk_pcie_ops_v2,

	.startup = mtk_pcie_startup_port_v2,

	.setup_irq = mtk_pcie_setup_irq,

	.quirks = MTK_PCIE_FIX_CLASS_ID | MTK_PCIE_FIX_DEVICE_ID,

};



static const struct of_device_id mtk_pcie_ids[] = {