Commit 044f721c authored by Peter Zijlstra's avatar Peter Zijlstra
Browse files

objtool/x86: Fix NOP decode 



For x86_64 the kernel consistently uses 2 instructions for all NOPs:

  90       - NOP
  0f 1f /0 - NOPL

Notably:

 - REP NOP is PAUSE, not a NOP instruction.

 - 0f {0c...0f} is reserved space,
   except for 0f 0d /1, which is PREFETCHW, not a NOP.

 - 0f {19,1c...1f} is reserved space,
   except for 0f 1f /0, which is NOPL.

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
parent 76e1851a

tools/objtool/arch/x86/decode.c

+11 −4
Original line number Diff line number Diff line
@@ -494,6 +494,12 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec 
		break;



	case 0x90:

		if (rex_b) /* XCHG %r8, %rax */

			break;



		if (prefix == 0xf3) /* REP NOP := PAUSE */

			break;



		insn->type = INSN_NOP;

		break;
@@ -547,12 +553,13 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec 


		} else if (op2 == 0x0b || op2 == 0xb9) {



			/* ud2 */

			/* ud2, ud1 */

			insn->type = INSN_BUG;



		} else if (op2 == 0x0d || op2 == 0x1f) {

		} else if (op2 == 0x1f) {



			/* nopl/nopw */

			/* 0f 1f /0 := NOPL */

			if (modrm_reg == 0)

				insn->type = INSN_NOP;



		} else if (op2 == 0x1e) {