Commit 0453f175 authored by Thomas Hellström's avatar Thomas Hellström
Browse files

drm/xe: Make TLB invalidation fences unordered 



They can actually complete out-of-order, so allocate a unique
fence context for each fence.

Fixes: 5387e865 ("drm/xe: Add TLB invalidation fence after rebinds issued from execs")
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: <stable@vger.kernel.org> # v6.8+
Signed-off-by: default avatarThomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240327091136.3271-4-thomas.hellstrom@linux.intel.com
parent 5a091aff

drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c

+0 −1
Original line number Diff line number Diff line
@@ -63,7 +63,6 @@ int xe_gt_tlb_invalidation_init(struct xe_gt *gt) 
	INIT_LIST_HEAD(&gt->tlb_invalidation.pending_fences);

	spin_lock_init(&gt->tlb_invalidation.pending_lock);

	spin_lock_init(&gt->tlb_invalidation.lock);

	gt->tlb_invalidation.fence_context = dma_fence_context_alloc(1);

	INIT_DELAYED_WORK(&gt->tlb_invalidation.fence_tdr,

			  xe_gt_tlb_fence_timeout);

drivers/gpu/drm/xe/xe_gt_types.h

+0 −7
Original line number Diff line number Diff line
@@ -179,13 +179,6 @@ struct xe_gt { 
		 * xe_gt_tlb_fence_timeout after the timeut interval is over.

		 */

		struct delayed_work fence_tdr;

		/** @tlb_invalidation.fence_context: context for TLB invalidation fences */

		u64 fence_context;

		/**

		 * @tlb_invalidation.fence_seqno: seqno to TLB invalidation fences, protected by

		 * tlb_invalidation.lock

		 */

		u32 fence_seqno;

		/** @tlb_invalidation.lock: protects TLB invalidation fences */

		spinlock_t lock;

	} tlb_invalidation;

drivers/gpu/drm/xe/xe_pt.c

+1 −2
Original line number Diff line number Diff line
@@ -1135,8 +1135,7 @@ static int invalidation_fence_init(struct xe_gt *gt, 
	spin_lock_irq(&gt->tlb_invalidation.lock);

	dma_fence_init(&ifence->base.base, &invalidation_fence_ops,

		       &gt->tlb_invalidation.lock,

		       gt->tlb_invalidation.fence_context,

		       ++gt->tlb_invalidation.fence_seqno);

		       dma_fence_context_alloc(1), 1);

	spin_unlock_irq(&gt->tlb_invalidation.lock);



	INIT_LIST_HEAD(&ifence->base.link);