Commit 045448da authored by Matthew Brost's avatar Matthew Brost Committed by Matthew Auld
Browse files

drm/xe: Add XE_BO_FLAG_PINNED_NORESTORE 



Not all BOs need to be restored on resume / d3cold exit, add
XE_BO_FLAG_PINNED_NO_RESTORE which skips restoring of BOs rather just
allocates VRAM for the BO. This should slightly speedup resume / d3cold
exit flows.

Marking GuC ADS, GuC CT, GuC log, GuC PC, and SA as NORESTORE.

v2:
 - s/WONTNEED/NORESTORE (Vivi)
 - Rebase on newly added g2g and backup object flow

Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20250403102440.266113-11-matthew.auld@intel.com
parent 86f69c26

drivers/gpu/drm/xe/xe_bo.c

+5 −1
Original line number Diff line number Diff line
@@ -1110,6 +1110,9 @@ int xe_bo_evict_pinned(struct xe_bo *bo) 
	if (!xe_bo_is_vram(bo))

		goto out_unlock_bo;



	if (bo->flags & XE_BO_FLAG_PINNED_NORESTORE)

		goto out_unlock_bo;



	backup = xe_bo_create_locked(xe, NULL, NULL, bo->size, ttm_bo_type_kernel,

				     XE_BO_FLAG_SYSTEM | XE_BO_FLAG_NEEDS_CPU_ACCESS |

				     XE_BO_FLAG_PINNED);
@@ -2123,7 +2126,8 @@ int xe_managed_bo_reinit_in_vram(struct xe_device *xe, struct xe_tile *tile, str 
	struct xe_bo *bo;

	u32 dst_flags = XE_BO_FLAG_VRAM_IF_DGFX(tile) | XE_BO_FLAG_GGTT;



	dst_flags |= (*src)->flags & XE_BO_FLAG_GGTT_INVALIDATE;

	dst_flags |= (*src)->flags & (XE_BO_FLAG_GGTT_INVALIDATE |

				      XE_BO_FLAG_PINNED_NORESTORE);



	xe_assert(xe, IS_DGFX(xe));

	xe_assert(xe, !(*src)->vmap.is_iomem);

drivers/gpu/drm/xe/xe_bo.h

+5 −4
Original line number Diff line number Diff line
@@ -39,10 +39,11 @@ 
#define XE_BO_FLAG_NEEDS_64K		BIT(15)

#define XE_BO_FLAG_NEEDS_2M		BIT(16)

#define XE_BO_FLAG_GGTT_INVALIDATE	BIT(17)

#define XE_BO_FLAG_GGTT0                BIT(18)

#define XE_BO_FLAG_GGTT1                BIT(19)

#define XE_BO_FLAG_GGTT2                BIT(20)

#define XE_BO_FLAG_GGTT3                BIT(21)

#define XE_BO_FLAG_PINNED_NORESTORE	BIT(18)

#define XE_BO_FLAG_GGTT0                BIT(19)

#define XE_BO_FLAG_GGTT1                BIT(20)

#define XE_BO_FLAG_GGTT2                BIT(21)

#define XE_BO_FLAG_GGTT3                BIT(22)

#define XE_BO_FLAG_GGTT_ALL             (XE_BO_FLAG_GGTT0 | \

					 XE_BO_FLAG_GGTT1 | \

					 XE_BO_FLAG_GGTT2 | \

drivers/gpu/drm/xe/xe_guc.c

+2 −1
Original line number Diff line number Diff line
@@ -483,7 +483,8 @@ static int guc_g2g_alloc(struct xe_guc *guc) 
					  XE_BO_FLAG_VRAM_IF_DGFX(tile) |

					  XE_BO_FLAG_GGTT |

					  XE_BO_FLAG_GGTT_ALL |

					  XE_BO_FLAG_GGTT_INVALIDATE);

					  XE_BO_FLAG_GGTT_INVALIDATE |

					  XE_BO_FLAG_PINNED_NORESTORE);

	if (IS_ERR(bo))

		return PTR_ERR(bo);

drivers/gpu/drm/xe/xe_guc_ads.c

+2 −1
Original line number Diff line number Diff line
@@ -414,7 +414,8 @@ int xe_guc_ads_init(struct xe_guc_ads *ads) 
	bo = xe_managed_bo_create_pin_map(xe, tile, guc_ads_size(ads) + MAX_GOLDEN_LRC_SIZE,

					  XE_BO_FLAG_SYSTEM |

					  XE_BO_FLAG_GGTT |

					  XE_BO_FLAG_GGTT_INVALIDATE);

					  XE_BO_FLAG_GGTT_INVALIDATE |

					  XE_BO_FLAG_PINNED_NORESTORE);

	if (IS_ERR(bo))

		return PTR_ERR(bo);

drivers/gpu/drm/xe/xe_guc_ct.c

+2 −1
Original line number Diff line number Diff line
@@ -238,7 +238,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct) 
	bo = xe_managed_bo_create_pin_map(xe, tile, guc_ct_size(),

					  XE_BO_FLAG_SYSTEM |

					  XE_BO_FLAG_GGTT |

					  XE_BO_FLAG_GGTT_INVALIDATE);

					  XE_BO_FLAG_GGTT_INVALIDATE |

					  XE_BO_FLAG_PINNED_NORESTORE);

	if (IS_ERR(bo))

		return PTR_ERR(bo);