Unverified Commit 0467d6c9 authored by Feng Chen's avatar Feng Chen Committed by Mark Brown
Browse files

spi: dt-bindings: add Amlogic A113L2 SFC 



The Flash Controller is derived by adding an SPI path to the original
raw NAND controller. This controller supports two modes: raw mode and
SPI mode. The raw mode has already been implemented in the community,
and the SPI mode is described here.

Add bindings for Amlogic A113L2 SPI Flash Controller.

Signed-off-by: default avatarFeng Chen <feng.chen@amlogic.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarXianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://patch.msgid.link/20250910-spifc-v6-1-1574aa9baebd@amlogic.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 76eeb9b8

Documentation/devicetree/bindings/spi/amlogic,a4-spifc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) 2025 Amlogic, Inc. All rights reserved

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/amlogic,a4-spifc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: SPI flash controller for Amlogic ARM SoCs



maintainers:

  - Liang Yang <liang.yang@amlogic.com>

  - Feng Chen <feng.chen@amlogic.com>

  - Xianwei Zhao <xianwei.zhao@amlogic.com>



description:

  The Amlogic SPI flash controller is an extended version of the Amlogic NAND

  flash controller. It supports SPI Nor Flash and SPI NAND Flash(where the Host

  ECC HW engine could be enabled).



allOf:

  - $ref: /schemas/spi/spi-controller.yaml#



properties:

  compatible:

    const: amlogic,a4-spifc



  reg:

    maxItems: 1



  clocks:

    items:

      - description: clock apb gate

      - description: clock used for the controller



  clock-names:

    items:

      - const: gate

      - const: core



  interrupts:

    maxItems: 1



  amlogic,rx-adj:

    description:

      Number of clock cycles by which sampling is delayed.

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [0, 1, 2, 3]

    default: 0



required:

  - compatible

  - reg

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    sfc0: spi@fe08d000 {

      compatible = "amlogic,a4-spifc";

      reg = <0xfe08d000 0x800>;

      clocks = <&clkc_periphs 31>,

               <&clkc_periphs 102>;

      clock-names = "gate", "core";



      pinctrl-0 = <&spiflash_default>;

      pinctrl-names = "default";



      #address-cells = <1>;

      #size-cells = <0>;



      flash@0 {

          compatible = "spi-nand";

          reg = <0>;

          #address-cells = <1>;

          #size-cells = <1>;

          nand-ecc-engine = <&sfc0>;

          nand-ecc-strength = <8>;

          nand-ecc-step-size = <512>;

      };

    };