Commit 0492e13e authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/dram: move fsb_freq and mem_freq to dram info



Store fsb_freq and mem_freq in dram info the same way we do for other
memory info on later platforms for a slightly more unified approach.

This allows us to remove fsb_freq, mem_freq and is_ddr3 members from
struct drm_i915_private and struct xe_device.

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/a38c4b105ba9098fa0b128cb86cd4eb63bcc27e8.1755511595.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 10e656f8
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+8 −5
Original line number Diff line number Diff line
@@ -3,6 +3,8 @@
 * Copyright © 2023 Intel Corporation
 */

#include "soc/intel_dram.h"

#include "i915_drv.h"
#include "i915_reg.h"
#include "i9xx_wm.h"
@@ -85,7 +87,8 @@ static const struct cxsr_latency cxsr_latency_table[] = {

static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
{
	struct drm_i915_private *i915 = to_i915(display->drm);
	const struct dram_info *dram_info = intel_dram_info(display->drm);
	bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
	int i;

	for (i = 0; i < ARRAY_SIZE(cxsr_latency_table); i++) {
@@ -93,15 +96,15 @@ static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *dis
		bool is_desktop = !display->platform.mobile;

		if (is_desktop == latency->is_desktop &&
		    i915->is_ddr3 == latency->is_ddr3 &&
		    DIV_ROUND_CLOSEST(i915->fsb_freq, 1000) == latency->fsb_freq &&
		    DIV_ROUND_CLOSEST(i915->mem_freq, 1000) == latency->mem_freq)
		    is_ddr3 == latency->is_ddr3 &&
		    DIV_ROUND_CLOSEST(dram_info->fsb_freq, 1000) == latency->fsb_freq &&
		    DIV_ROUND_CLOSEST(dram_info->mem_freq, 1000) == latency->mem_freq)
			return latency;
	}

	drm_dbg_kms(display->drm,
		    "Could not find CxSR latency for DDR%s, FSB %u kHz, MEM %u kHz\n",
		    i915->is_ddr3 ? "3" : "2", i915->fsb_freq, i915->mem_freq);
		    is_ddr3 ? "3" : "2", dram_info->fsb_freq, dram_info->mem_freq);

	return NULL;
}
+0 −2
Original line number Diff line number Diff line
@@ -239,8 +239,6 @@ struct drm_i915_private {

	bool preserve_bios_swizzle;

	unsigned int fsb_freq, mem_freq, is_ddr3;

	unsigned int hpll_freq;
	unsigned int czclk_freq;

+16 −22
Original line number Diff line number Diff line
@@ -150,17 +150,6 @@ unsigned int intel_mem_freq(struct drm_i915_private *i915)
		return 0;
}

static void detect_mem_freq(struct drm_i915_private *i915)
{
	i915->mem_freq = intel_mem_freq(i915);

	if (IS_PINEVIEW(i915))
		i915->is_ddr3 = pnv_is_ddr3(i915);

	if (i915->mem_freq)
		drm_dbg(&i915->drm, "DDR speed: %d kHz\n", i915->mem_freq);
}

static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
{
	u32 fsb;
@@ -253,11 +242,20 @@ unsigned int intel_fsb_freq(struct drm_i915_private *i915)
		return 0;
}

static void detect_fsb_freq(struct drm_i915_private *i915)
static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
{
	i915->fsb_freq = intel_fsb_freq(i915);
	if (i915->fsb_freq)
		drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", i915->fsb_freq);
	dram_info->fsb_freq = intel_fsb_freq(i915);
	if (dram_info->fsb_freq)
		drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);

	dram_info->mem_freq = intel_mem_freq(i915);
	if (dram_info->mem_freq)
		drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);

	if (IS_PINEVIEW(i915) && pnv_is_ddr3(i915))
		dram_info->type = INTEL_DRAM_DDR3;

	return 0;
}

static int intel_dimm_num_devices(const struct dram_dimm_info *dimm)
@@ -730,12 +728,6 @@ int intel_dram_detect(struct drm_i915_private *i915)
	if (IS_DG2(i915) || !HAS_DISPLAY(display))
		return 0;

	detect_fsb_freq(i915);
	detect_mem_freq(i915);

	if (GRAPHICS_VER(i915) < 9)
		return 0;

	dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
	if (!dram_info)
		return -ENOMEM;
@@ -756,8 +748,10 @@ int intel_dram_detect(struct drm_i915_private *i915)
		ret = gen11_get_dram_info(i915, dram_info);
	else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
		ret = bxt_get_dram_info(i915, dram_info);
	else
	else if (GRAPHICS_VER(i915) >= 9)
		ret = skl_get_dram_info(i915, dram_info);
	else
		ret = i915_get_dram_info(i915, dram_info);

	drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
		    intel_dram_type_str(dram_info->type));
+2 −0
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ struct dram_info {
	} type;
	u8 num_qgv_points;
	u8 num_psf_gv_points;
	unsigned int fsb_freq;
	unsigned int mem_freq;
};

void intel_dram_edram_detect(struct drm_i915_private *i915);
+0 −1
Original line number Diff line number Diff line
@@ -621,7 +621,6 @@ struct xe_device {
	struct {
		unsigned int hpll_freq;
		unsigned int czclk_freq;
		unsigned int fsb_freq, mem_freq, is_ddr3;
	};
#endif
};