Commit 0493e739 authored by Jason Gunthorpe's avatar Jason Gunthorpe Committed by Will Deacon
Browse files

iommu/arm-smmu-v3: Add cpu_to_le64() around STRTAB_STE_0_V 



STRTAB_STE_0_V is a CPU value, it needs conversion for sparse to be clean.

The missing annotation was a mistake introduced by splitting the ops out
from the STE writer.

Fixes: 7da51af9 ("iommu/arm-smmu-v3: Make STE programming independent of the callers")
Reported-by: default avatarkernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202403011441.5WqGrYjp-lkp@intel.com/


Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/0-v1-98b23ebb0c84+9f-smmu_cputole_jgg@nvidia.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 4cece764

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

+2 −1
Original line number Diff line number Diff line
@@ -1139,7 +1139,8 @@ static void arm_smmu_write_ste(struct arm_smmu_master *master, u32 sid, 
		 * requires a breaking update, zero the V bit, write all qwords

		 * but 0, then set qword 0

		 */

		unused_update.data[0] = entry->data[0] & (~STRTAB_STE_0_V);

		unused_update.data[0] = entry->data[0] &

					cpu_to_le64(~STRTAB_STE_0_V);

		entry_set(smmu, sid, entry, &unused_update, 0, 1);

		entry_set(smmu, sid, entry, target, 1, num_entry_qwords - 1);

		entry_set(smmu, sid, entry, target, 0, 1);