Commit 04af8a39 authored by Ilpo Järvinen's avatar Ilpo Järvinen Committed by Bjorn Helgaas
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PCI: Protect Link Control 2 Register with RMW locking 

The PCIe Bandwidth Controller performs RMW accesses the Link Control 2
Register which can occur concurrently to other sources of Link Control 2
Register writes. Therefore, add Link Control 2 Register among the PCI
Express Capability Registers that need RMW locking.

Link: https://lore.kernel.org/r/20241018144755.7875-3-ilpo.jarvinen@linux.intel.com


Signed-off-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarLukas Wunner <lukas@wunner.de>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent fad610b9

Documentation/PCI/pciebus-howto.rst

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Original line number Diff line number Diff line
@@ -221,6 +221,7 @@ a selected set of PCI Express Capability Registers: 


* Link Control Register

* Root Control Register

* Link Control 2 Register



Any change to those registers should be performed using RMW accessors to

avoid problems due to concurrent updates. For the up-to-date list of

include/linux/pci.h

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Original line number Diff line number Diff line
@@ -1274,6 +1274,7 @@ static inline int pcie_capability_clear_and_set_word(struct pci_dev *dev, 
{

	switch (pos) {

	case PCI_EXP_LNKCTL:

	case PCI_EXP_LNKCTL2:

	case PCI_EXP_RTCTL:

		return pcie_capability_clear_and_set_word_locked(dev, pos,

								 clear, set);