Commit 04b1b069 authored by Yi Liu's avatar Yi Liu Committed by Joerg Roedel
Browse files

iommu/vt-d: Flush piotlb for SVM and Nested domain 



Besides the paging domains that use FS, SVM and Nested domains need to
use piotlb invalidation descriptor as well.

Fixes: b3312529 ("iommu/vt-d: Create unique domain ops for each stage")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarYi Liu <yi.l.liu@intel.com>
Reviewed-by: default avatarKevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20251223065824.6164-1-yi.l.liu@intel.com


Signed-off-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent 22d169bd

drivers/iommu/intel/cache.c

+8 −1
Original line number Diff line number Diff line
@@ -363,6 +363,13 @@ static void qi_batch_add_pasid_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 
	qi_batch_increment_index(iommu, batch);

}



static bool intel_domain_use_piotlb(struct dmar_domain *domain)

{

	return domain->domain.type == IOMMU_DOMAIN_SVA ||

			domain->domain.type == IOMMU_DOMAIN_NESTED ||

			intel_domain_is_fs_paging(domain);

}



static void cache_tag_flush_iotlb(struct dmar_domain *domain, struct cache_tag *tag,

				  unsigned long addr, unsigned long pages,

				  unsigned long mask, int ih)
@@ -370,7 +377,7 @@ static void cache_tag_flush_iotlb(struct dmar_domain *domain, struct cache_tag * 
	struct intel_iommu *iommu = tag->iommu;

	u64 type = DMA_TLB_PSI_FLUSH;



	if (intel_domain_is_fs_paging(domain)) {

	if (intel_domain_use_piotlb(domain)) {

		qi_batch_add_piotlb(iommu, tag->domain_id, tag->pasid, addr,

				    pages, ih, domain->qi_batch);

		return;