Commit 04e1ba85 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Ingo Molnar
Browse files

x86: cleanup kernel/setup_64.c 



Clean it up before applying more patches to it.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 5cabbd97

arch/x86/kernel/setup_64.c

+126 −123
Original line number Diff line number Diff line
@@ -208,7 +208,8 @@ static void __init reserve_crashkernel(void) 
	unsigned long long crash_size, crash_base;

	int ret;



	free_mem = ((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT;

	free_mem =

		((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT;



	ret = parse_crashkernel(boot_command_line, free_mem,

			&crash_size, &crash_base);
@@ -259,6 +260,8 @@ static void discover_ebda(void) 


void __init setup_arch(char **cmdline_p)

{

	unsigned i;



	printk(KERN_INFO "Command line: %s\n", boot_command_line);



	ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev);
@@ -441,12 +444,9 @@ void __init setup_arch(char **cmdline_p) 
	e820_reserve_resources(&code_resource, &data_resource, &bss_resource);

	e820_mark_nosave_regions();



	{

	unsigned i;

	/* request I/O space for devices used on all i[345]86 PCs */

	for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)

		request_resource(&ioport_resource, &standard_io_resources[i]);

	}



	e820_setup_gap();
@@ -483,7 +483,8 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) 


	if (n >= 0x80000005) {

		cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);

		printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",

		printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), "

		       "D cache %dK (%d bytes/line)\n",

		       edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);

		c->x86_cache_size = (ecx>>24) + (edx>>24);

		/* On K8 L1 TLB is inclusive, so don't count it */
@@ -512,14 +513,15 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) 
#ifdef CONFIG_NUMA

static int nearby_node(int apicid)

{

	int i;

	int i, node;



	for (i = apicid - 1; i >= 0; i--) {

		int node = apicid_to_node[i];

		node = apicid_to_node[i];

		if (node != NUMA_NO_NODE && node_online(node))

			return node;

	}

	for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {

		int node = apicid_to_node[i];

		node = apicid_to_node[i];

		if (node != NUMA_NO_NODE && node_online(node))

			return node;

	}
@@ -572,7 +574,9 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) 
		   but in the same order as the HT nodeids.

		   If that doesn't result in a usable node fall back to the

		   path for the previous case.  */



		int ht_nodeid = apicid - (cpu_data(0).phys_proc_id << bits);



		if (ht_nodeid >= 0 &&

		    apicid_to_node[ht_nodeid] != NUMA_NO_NODE)

			node = apicid_to_node[ht_nodeid];
@@ -599,8 +603,8 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) 
/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */

static __cpuinit int amd_apic_timer_broken(void)

{

	u32 lo, hi;

	u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);

	u32 lo, hi, eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);



	switch (eax & CPUID_XFAM) {

	case CPUID_XFAM_K8:

		if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
@@ -645,7 +649,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) 


	/* On C+ stepping K8 rep microcode works well for copy/memset */

	level = cpuid_eax(1);

	if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))

	if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) ||

			     level >= 0x0f58))

		set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);

	if (c->x86 == 0x10 || c->x86 == 0x11)

		set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
@@ -715,7 +720,8 @@ static void __cpuinit detect_ht(struct cpuinfo_x86 *c) 
	} else if (smp_num_siblings > 1) {



		if (smp_num_siblings > NR_CPUS) {

			printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);

			printk(KERN_WARNING "CPU: Unsupported number of "

			       "siblings %d", smp_num_siblings);

			smp_num_siblings = 1;

			return;

		}
@@ -734,8 +740,10 @@ static void __cpuinit detect_ht(struct cpuinfo_x86 *c) 
	}

out:

	if ((c->x86_max_cores * smp_num_siblings) > 1) {

		printk(KERN_INFO  "CPU: Physical Processor ID: %d\n", c->phys_proc_id);

		printk(KERN_INFO  "CPU: Processor Core ID: %d\n", c->cpu_core_id);

		printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",

		       c->phys_proc_id);

		printk(KERN_INFO  "CPU: Processor Core ID: %d\n",

		       c->cpu_core_id);

	}



#endif
@@ -983,16 +991,15 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) 
#endif

}





void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)

{

	if (c->x86_model_id[0])

		printk("%s", c->x86_model_id);

		printk(KERN_INFO "%s", c->x86_model_id);



	if (c->x86_mask || c->cpuid_level >= 0)

		printk(" stepping %02x\n", c->x86_mask);

		printk(KERN_CONT " stepping %02x\n", c->x86_mask);

	else

		printk("\n");

		printk(KERN_CONT "\n");

}



/*
@@ -1002,7 +1009,7 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) 
static int show_cpuinfo(struct seq_file *m, void *v)

{

	struct cpuinfo_x86 *c = v;

	int cpu = 0;

	int cpu = 0, i;



	/*

	 * These flag bits must match the definitions in <asm/cpufeature.h>.
@@ -1102,6 +1109,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) 


	if (cpu_has(c, X86_FEATURE_TSC)) {

		unsigned int freq = cpufreq_quick_get((unsigned)cpu);



		if (!freq)

			freq = cpu_khz;

		seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
@@ -1130,12 +1138,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) 
		   "flags\t\t:",

		   c->cpuid_level);



	{ 

		int i; 

	for (i = 0; i < 32*NCAPINTS; i++)

		if (cpu_has(c, i) && x86_cap_flags[i] != NULL)

			seq_printf(m, " %s", x86_cap_flags[i]);

	}



	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",

		   c->loops_per_jiffy/(500000/HZ),
@@ -1150,9 +1155,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) 
		   c->x86_phys_bits, c->x86_virt_bits);



	seq_printf(m, "power management:");

	{

		unsigned i;

		for (i = 0; i < 32; i++) 

	for (i = 0; i < 32; i++) {

		if (c->x86_power & (1 << i)) {

			if (i < ARRAY_SIZE(x86_power_flags) &&

			    x86_power_flags[i])