Commit 04f38d1a authored by Daniel González Cabanelas's avatar Daniel González Cabanelas Committed by Thomas Bogendoerfer
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mips: bmips: enable RAC on BMIPS4350 



The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.

Signed-off-by: default avatarDaniel González Cabanelas <dgcbueu@gmail.com>
Signed-off-by: default avatarÁlvaro Fernández Rojas <noltari@gmail.com>
[ rework code and reduce code duplication ]
Acked-by: default avatarFlorian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: default avatarChristian Marangi <ansuelsmth@gmail.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent b95b30e5

arch/mips/kernel/smp-bmips.c

+18 −0
Original line number Diff line number Diff line
@@ -592,6 +592,7 @@ asmlinkage void __weak plat_wired_tlb_setup(void) 
void bmips_cpu_setup(void)

{

	void __iomem __maybe_unused *cbr = bmips_cbr_addr;

	u32 __maybe_unused rac_addr;

	u32 __maybe_unused cfg;



	switch (current_cpu_type()) {
@@ -620,6 +621,23 @@ void bmips_cpu_setup(void) 
		__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);

		break;



	case CPU_BMIPS4350:

		rac_addr = BMIPS_RAC_CONFIG_1;



		if (!(read_c0_brcm_cmt_local() & (1 << 31)))

			rac_addr = BMIPS_RAC_CONFIG;



		/* Enable data RAC */

		cfg = __raw_readl(cbr + rac_addr);

		__raw_writel(cfg | 0xf, cbr + rac_addr);

		__raw_readl(cbr + rac_addr);



		/* Flush stale data out of the readahead cache */

		cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);

		__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);

		__raw_readl(cbr + BMIPS_RAC_CONFIG);

		break;



	case CPU_BMIPS4380:

		/* CBG workaround for early BMIPS4380 CPUs */

		switch (read_c0_prid()) {