Commit 05031de3 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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clk: renesas: r9a09g057: Add clock and reset entries for GIC 



Add clock and reset entries for GIC.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250102181839.352599-7-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 7e3557b4

drivers/clk/renesas/r9a09g057-cpg.c

+4 −0
Original line number Diff line number Diff line
@@ -117,6 +117,8 @@ static const struct cpg_core_clk r9a09g057_core_clks[] __initconst = { 
static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = {

	DEF_MOD_CRITICAL("icu_0_pclk_i",	CLK_PLLCM33_DIV16, 0, 5, 0, 5,

						BUS_MSTOP_NONE),

	DEF_MOD_CRITICAL("gic_0_gicclk",	CLK_PLLDTY_ACPU_DIV4, 1, 3, 0, 19,

						BUS_MSTOP(3, BIT(5))),

	DEF_MOD("gtm_0_pclk",			CLK_PLLCM33_DIV16, 4, 3, 2, 3,

						BUS_MSTOP(5, BIT(10))),

	DEF_MOD("gtm_1_pclk",			CLK_PLLCM33_DIV16, 4, 4, 2, 4,
@@ -222,6 +224,8 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = { 
static const struct rzv2h_reset r9a09g057_resets[] __initconst = {

	DEF_RST(3, 0, 1, 1),		/* SYS_0_PRESETN */

	DEF_RST(3, 6, 1, 7),		/* ICU_0_PRESETN_I */

	DEF_RST(3, 8, 1, 9),		/* GIC_0_GICRESET_N */

	DEF_RST(3, 9, 1, 10),		/* GIC_0_DBG_GICRESET_N */

	DEF_RST(6, 13, 2, 30),		/* GTM_0_PRESETZ */

	DEF_RST(6, 14, 2, 31),		/* GTM_1_PRESETZ */

	DEF_RST(6, 15, 3, 0),		/* GTM_2_PRESETZ */