Commit 05613248 authored by Srinivasan Shanmugam's avatar Srinivasan Shanmugam Committed by Alex Deucher
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drm/amdgpu/uapi: Introduce AMDGPU_GEM_DOMAIN_MMIO_REMAP 



Add a new GEM domain bit AMDGPU_GEM_DOMAIN_MMIO_REMAP to allow
userspace to request the MMIO remap (HDP flush) page via GEM_CREATE.

- include/uapi/drm/amdgpu_drm.h:
  * define AMDGPU_GEM_DOMAIN_MMIO_REMAP
  * include the bit in AMDGPU_GEM_DOMAIN_MASK

v2: Add early reject in amdgpu_gem_create_ioctl() (Alex).

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 60df8a5d

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+3 −0
Original line number Diff line number Diff line
@@ -457,6 +457,9 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data, 
	/* always clear VRAM */

	flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED;



	if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP)

		return -EINVAL;



	/* create a gem object to contain this object in */

	if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |

	    AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {

include/uapi/drm/amdgpu_drm.h

+6 −2
Original line number Diff line number Diff line
@@ -105,6 +105,8 @@ extern "C" { 
 *

 * %AMDGPU_GEM_DOMAIN_DOORBELL	Doorbell. It is an MMIO region for

 * signalling user mode queues.

 *

 * %AMDGPU_GEM_DOMAIN_MMIO_REMAP	MMIO remap page (special mapping for HDP flushing).

 */

#define AMDGPU_GEM_DOMAIN_CPU		0x1

#define AMDGPU_GEM_DOMAIN_GTT		0x2
@@ -113,13 +115,15 @@ extern "C" { 
#define AMDGPU_GEM_DOMAIN_GWS		0x10

#define AMDGPU_GEM_DOMAIN_OA		0x20

#define AMDGPU_GEM_DOMAIN_DOORBELL	0x40

#define AMDGPU_GEM_DOMAIN_MMIO_REMAP	0x80

#define AMDGPU_GEM_DOMAIN_MASK		(AMDGPU_GEM_DOMAIN_CPU | \

					 AMDGPU_GEM_DOMAIN_GTT | \

					 AMDGPU_GEM_DOMAIN_VRAM | \

					 AMDGPU_GEM_DOMAIN_GDS | \

					 AMDGPU_GEM_DOMAIN_GWS | \

					 AMDGPU_GEM_DOMAIN_OA |	\

					 AMDGPU_GEM_DOMAIN_DOORBELL)

					 AMDGPU_GEM_DOMAIN_DOORBELL | \

					 AMDGPU_GEM_DOMAIN_MMIO_REMAP)



/* Flag that CPU access will be required for the case of VRAM domain */

#define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED	(1 << 0)