Commit 05e4941d authored Nov 17, 2023 by Rajendra Nayak Committed by Linus Walleij Nov 24, 2023

pinctrl: qcom: Add X1E80100 pinctrl driver



Add initial pinctrl driver to support pin configuration with pinctrl
framework for X1E80100 SoC.

Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231117093921.31968-3-quic_sibis@quicinc.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

parent 5180f4fa

drivers/pinctrl/qcom/Kconfig.msm

+10 −0

Original line number	Diff line number	Diff line
		@@ -374,4 +374,14 @@ config PINCTRL_SM8650
		Qualcomm Technologies Inc TLMM block found on the Qualcomm
		Technologies Inc SM8650 platform.

		config PINCTRL_X1E80100
		tristate "Qualcomm Technologies Inc X1E80100 pin controller driver"
		depends on ARM64 \|\| COMPILE_TEST
		help
		This is the pinctrl, pinmux, pinconf and gpiolib driver for the
		Qualcomm Technologies Inc Top Level Mode Multiplexer block (TLMM)
		block found on the Qualcomm Technologies Inc X1E80100 platform.
		Say Y here to compile statically, or M here to compile it as a module.
		If unsure, say N.

		endif

drivers/pinctrl/qcom/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -62,3 +62,4 @@ obj-$(CONFIG_PINCTRL_SM8650) += pinctrl-sm8650.o
		obj-$(CONFIG_PINCTRL_SM8650_LPASS_LPI) += pinctrl-sm8650-lpass-lpi.o
		obj-$(CONFIG_PINCTRL_SC8280XP_LPASS_LPI) += pinctrl-sc8280xp-lpass-lpi.o
		obj-$(CONFIG_PINCTRL_LPASS_LPI) += pinctrl-lpass-lpi.o
		obj-$(CONFIG_PINCTRL_X1E80100) += pinctrl-x1e80100.o

drivers/pinctrl/qcom/pinctrl-x1e80100.c

0 → 100644

+1876 −0

File added.

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