Commit 063db451 authored by Lizhi Hou's avatar Lizhi Hou
Browse files

accel/amdxdna: Enhance runtime power management 



Currently, pm_runtime_resume_and_get() is invoked in the driver's open
callback, and pm_runtime_put_autosuspend() is called in the close
callback. As a result, the device remains active whenever an application
opens it, even if no I/O is performed, leading to unnecessary power
consumption.

Move the runtime PM calls to the AIE2 callbacks that actually interact
with the hardware. The device will automatically suspend after 5 seconds
of inactivity (no hardware accesses and no pending commands), and it will
be resumed on the next hardware access.

Reviewed-by: default avatarKarol Wachowski <karol.wachowski@linux.intel.com>
Signed-off-by: default avatarLizhi Hou <lizhi.hou@amd.com>
Link: https://lore.kernel.org/r/20250923152229.1303625-1-lizhi.hou@amd.com
parent 90315cd2

drivers/accel/amdxdna/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ amdxdna-y := \ 
	amdxdna_mailbox.o \

	amdxdna_mailbox_helper.o \

	amdxdna_pci_drv.o \

	amdxdna_pm.o \

	amdxdna_sysfs.o \

	amdxdna_ubuf.o \

	npu1_regs.o \

drivers/accel/amdxdna/aie2_ctx.c

+31 −11
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#include "amdxdna_gem.h"

#include "amdxdna_mailbox.h"

#include "amdxdna_pci_drv.h"

#include "amdxdna_pm.h"



static bool force_cmdlist;

module_param(force_cmdlist, bool, 0600);
@@ -88,7 +89,7 @@ static int aie2_hwctx_restart(struct amdxdna_dev *xdna, struct amdxdna_hwctx *hw 
		goto out;

	}



	ret = aie2_config_cu(hwctx);

	ret = aie2_config_cu(hwctx, NULL);

	if (ret) {

		XDNA_ERR(xdna, "Config cu failed, ret %d", ret);

		goto out;
@@ -167,14 +168,11 @@ static int aie2_hwctx_resume_cb(struct amdxdna_hwctx *hwctx, void *arg) 


int aie2_hwctx_resume(struct amdxdna_client *client)

{

	struct amdxdna_dev *xdna = client->xdna;



	/*

	 * The resume path cannot guarantee that mailbox channel can be

	 * regenerated. If this happen, when submit message to this

	 * mailbox channel, error will return.

	 */

	drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock));

	return amdxdna_hwctx_walk(client, NULL, aie2_hwctx_resume_cb);

}
@@ -184,6 +182,8 @@ aie2_sched_notify(struct amdxdna_sched_job *job) 
	struct dma_fence *fence = job->fence;



	trace_xdna_job(&job->base, job->hwctx->name, "signaled fence", job->seq);



	amdxdna_pm_suspend_put(job->hwctx->client->xdna);

	job->hwctx->priv->completed++;

	dma_fence_signal(fence);
@@ -531,7 +531,7 @@ int aie2_hwctx_init(struct amdxdna_hwctx *hwctx) 
		.num_rqs = DRM_SCHED_PRIORITY_COUNT,

		.credit_limit = HWCTX_MAX_CMDS,

		.timeout = msecs_to_jiffies(HWCTX_MAX_TIMEOUT),

		.name = hwctx->name,

		.name = "amdxdna_js",

		.dev = xdna->ddev.dev,

	};

	struct drm_gpu_scheduler *sched;
@@ -697,6 +697,14 @@ void aie2_hwctx_fini(struct amdxdna_hwctx *hwctx) 
	kfree(hwctx->cus);

}



static int aie2_config_cu_resp_handler(void *handle, void __iomem *data, size_t size)

{

	struct amdxdna_hwctx *hwctx = handle;



	amdxdna_pm_suspend_put(hwctx->client->xdna);

	return 0;

}



static int aie2_hwctx_cu_config(struct amdxdna_hwctx *hwctx, void *buf, u32 size)

{

	struct amdxdna_hwctx_param_config_cu *config = buf;
@@ -728,10 +736,14 @@ static int aie2_hwctx_cu_config(struct amdxdna_hwctx *hwctx, void *buf, u32 size 
	if (!hwctx->cus)

		return -ENOMEM;



	ret = aie2_config_cu(hwctx);

	ret = amdxdna_pm_resume_get(xdna);

	if (ret)

		goto free_cus;



	ret = aie2_config_cu(hwctx, aie2_config_cu_resp_handler);

	if (ret) {

		XDNA_ERR(xdna, "Config CU to firmware failed, ret %d", ret);

		goto free_cus;

		goto pm_suspend_put;

	}



	wmb(); /* To avoid locking in command submit when check status */
@@ -739,6 +751,8 @@ static int aie2_hwctx_cu_config(struct amdxdna_hwctx *hwctx, void *buf, u32 size 


	return 0;



pm_suspend_put:

	amdxdna_pm_suspend_put(xdna);

free_cus:

	kfree(hwctx->cus);

	hwctx->cus = NULL;
@@ -862,11 +876,15 @@ int aie2_cmd_submit(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, 
		goto free_chain;

	}



	ret = amdxdna_pm_resume_get(xdna);

	if (ret)

		goto cleanup_job;



retry:

	ret = drm_gem_lock_reservations(job->bos, job->bo_cnt, &acquire_ctx);

	if (ret) {

		XDNA_WARN(xdna, "Failed to lock BOs, ret %d", ret);

		goto cleanup_job;

		goto suspend_put;

	}



	for (i = 0; i < job->bo_cnt; i++) {
@@ -874,7 +892,7 @@ int aie2_cmd_submit(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, 
		if (ret) {

			XDNA_WARN(xdna, "Failed to reserve fences %d", ret);

			drm_gem_unlock_reservations(job->bos, job->bo_cnt, &acquire_ctx);

			goto cleanup_job;

			goto suspend_put;

		}

	}
@@ -889,12 +907,12 @@ int aie2_cmd_submit(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, 
					msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT);

			} else if (time_after(jiffies, timeout)) {

				ret = -ETIME;

				goto cleanup_job;

				goto suspend_put;

			}



			ret = aie2_populate_range(abo);

			if (ret)

				goto cleanup_job;

				goto suspend_put;

			goto retry;

		}

	}
@@ -920,6 +938,8 @@ int aie2_cmd_submit(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, 


	return 0;



suspend_put:

	amdxdna_pm_suspend_put(xdna);

cleanup_job:

	drm_sched_job_cleanup(&job->base);

free_chain:

drivers/accel/amdxdna/aie2_message.c

+12 −16
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ static int aie2_send_mgmt_msg_wait(struct amdxdna_dev_hdl *ndev, 
	if (!ndev->mgmt_chann)

		return -ENODEV;



	drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock));

	drm_WARN_ON(&xdna->ddev, xdna->rpm_on && !mutex_is_locked(&xdna->dev_lock));

	ret = xdna_send_msg_wait(xdna, ndev->mgmt_chann, msg);

	if (ret == -ETIME) {

		xdna_mailbox_stop_channel(ndev->mgmt_chann);
@@ -377,15 +377,17 @@ int aie2_register_asyn_event_msg(struct amdxdna_dev_hdl *ndev, dma_addr_t addr, 
	return xdna_mailbox_send_msg(ndev->mgmt_chann, &msg, TX_TIMEOUT);

}



int aie2_config_cu(struct amdxdna_hwctx *hwctx)

int aie2_config_cu(struct amdxdna_hwctx *hwctx,

		   int (*notify_cb)(void *, void __iomem *, size_t))

{

	struct mailbox_channel *chann = hwctx->priv->mbox_chann;

	struct amdxdna_dev *xdna = hwctx->client->xdna;

	u32 shift = xdna->dev_info->dev_mem_buf_shift;

	DECLARE_AIE2_MSG(config_cu, MSG_OP_CONFIG_CU);

	struct config_cu_req req = { 0 };

	struct xdna_mailbox_msg msg;

	struct drm_gem_object *gobj;

	struct amdxdna_gem_obj *abo;

	int ret, i;

	int i;



	if (!chann)

		return -ENODEV;
@@ -423,18 +425,12 @@ int aie2_config_cu(struct amdxdna_hwctx *hwctx) 
	}

	req.num_cus = hwctx->cus->num_cus;



	ret = xdna_send_msg_wait(xdna, chann, &msg);

	if (ret == -ETIME)

		aie2_destroy_context(xdna->dev_handle, hwctx);



	if (resp.status == AIE2_STATUS_SUCCESS) {

		XDNA_DBG(xdna, "Configure %d CUs, ret %d", req.num_cus, ret);

		return 0;

	}



	XDNA_ERR(xdna, "Command opcode 0x%x failed, status 0x%x ret %d",

		 msg.opcode, resp.status, ret);

	return ret;

	msg.send_data = (u8 *)&req;

	msg.send_size = sizeof(req);

	msg.handle = hwctx;

	msg.opcode = MSG_OP_CONFIG_CU;

	msg.notify_cb = notify_cb;

	return xdna_mailbox_send_msg(chann, &msg, TX_TIMEOUT);

}



int aie2_execbuf(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job,

drivers/accel/amdxdna/aie2_pci.c

+38 −41
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include "amdxdna_gem.h"

#include "amdxdna_mailbox.h"

#include "amdxdna_pci_drv.h"

#include "amdxdna_pm.h"



static int aie2_max_col = XRS_MAX_COL;

module_param(aie2_max_col, uint, 0600);
@@ -223,15 +224,6 @@ static int aie2_mgmt_fw_init(struct amdxdna_dev_hdl *ndev) 
		return ret;

	}



	if (!ndev->async_events)

		return 0;



	ret = aie2_error_async_events_send(ndev);

	if (ret) {

		XDNA_ERR(ndev->xdna, "Send async events failed");

		return ret;

	}



	return 0;

}
@@ -257,6 +249,8 @@ static int aie2_mgmt_fw_query(struct amdxdna_dev_hdl *ndev) 
		return ret;

	}



	ndev->total_col = min(aie2_max_col, ndev->metadata.cols);



	return 0;

}
@@ -338,6 +332,7 @@ static void aie2_hw_stop(struct amdxdna_dev *xdna) 
	ndev->mbox = NULL;

	aie2_psp_stop(ndev->psp_hdl);

	aie2_smu_fini(ndev);

	aie2_error_async_events_free(ndev);

	pci_disable_device(pdev);



	ndev->dev_status = AIE2_DEV_INIT;
@@ -424,6 +419,18 @@ static int aie2_hw_start(struct amdxdna_dev *xdna) 
		goto destroy_mgmt_chann;

	}



	ret = aie2_mgmt_fw_query(ndev);

	if (ret) {

		XDNA_ERR(xdna, "failed to query fw, ret %d", ret);

		goto destroy_mgmt_chann;

	}



	ret = aie2_error_async_events_alloc(ndev);

	if (ret) {

		XDNA_ERR(xdna, "Allocate async events failed, ret %d", ret);

		goto destroy_mgmt_chann;

	}



	ndev->dev_status = AIE2_DEV_START;



	return 0;
@@ -459,7 +466,6 @@ static int aie2_hw_resume(struct amdxdna_dev *xdna) 
	struct amdxdna_client *client;

	int ret;



	guard(mutex)(&xdna->dev_lock);

	ret = aie2_hw_start(xdna);

	if (ret) {

		XDNA_ERR(xdna, "Start hardware failed, %d", ret);
@@ -565,13 +571,6 @@ static int aie2_init(struct amdxdna_dev *xdna) 
		goto release_fw;

	}



	ret = aie2_mgmt_fw_query(ndev);

	if (ret) {

		XDNA_ERR(xdna, "Query firmware failed, ret %d", ret);

		goto stop_hw;

	}

	ndev->total_col = min(aie2_max_col, ndev->metadata.cols);



	xrs_cfg.clk_list.num_levels = ndev->max_dpm_level + 1;

	for (i = 0; i < xrs_cfg.clk_list.num_levels; i++)

		xrs_cfg.clk_list.cu_clk_list[i] = ndev->priv->dpm_clk_tbl[i].hclk;
@@ -587,30 +586,10 @@ static int aie2_init(struct amdxdna_dev *xdna) 
		goto stop_hw;

	}



	ret = aie2_error_async_events_alloc(ndev);

	if (ret) {

		XDNA_ERR(xdna, "Allocate async events failed, ret %d", ret);

		goto stop_hw;

	}



	ret = aie2_error_async_events_send(ndev);

	if (ret) {

		XDNA_ERR(xdna, "Send async events failed, ret %d", ret);

		goto async_event_free;

	}



	/* Issue a command to make sure firmware handled async events */

	ret = aie2_query_firmware_version(ndev, &ndev->xdna->fw_ver);

	if (ret) {

		XDNA_ERR(xdna, "Re-query firmware version failed");

		goto async_event_free;

	}



	release_firmware(fw);

	amdxdna_pm_init(xdna);

	return 0;



async_event_free:

	aie2_error_async_events_free(ndev);

stop_hw:

	aie2_hw_stop(xdna);

release_fw:
@@ -621,10 +600,8 @@ static int aie2_init(struct amdxdna_dev *xdna) 


static void aie2_fini(struct amdxdna_dev *xdna)

{

	struct amdxdna_dev_hdl *ndev = xdna->dev_handle;



	amdxdna_pm_fini(xdna);

	aie2_hw_stop(xdna);

	aie2_error_async_events_free(ndev);

}



static int aie2_get_aie_status(struct amdxdna_client *client,
@@ -856,6 +833,10 @@ static int aie2_get_info(struct amdxdna_client *client, struct amdxdna_drm_get_i 
	if (!drm_dev_enter(&xdna->ddev, &idx))

		return -ENODEV;



	ret = amdxdna_pm_resume_get(xdna);

	if (ret)

		goto dev_exit;



	switch (args->param) {

	case DRM_AMDXDNA_QUERY_AIE_STATUS:

		ret = aie2_get_aie_status(client, args);
@@ -882,8 +863,11 @@ static int aie2_get_info(struct amdxdna_client *client, struct amdxdna_drm_get_i 
		XDNA_ERR(xdna, "Not supported request parameter %u", args->param);

		ret = -EOPNOTSUPP;

	}



	amdxdna_pm_suspend_put(xdna);

	XDNA_DBG(xdna, "Got param %d", args->param);



dev_exit:

	drm_dev_exit(idx);

	return ret;

}
@@ -932,6 +916,10 @@ static int aie2_get_array(struct amdxdna_client *client, 
	if (!drm_dev_enter(&xdna->ddev, &idx))

		return -ENODEV;



	ret = amdxdna_pm_resume_get(xdna);

	if (ret)

		goto dev_exit;



	switch (args->param) {

	case DRM_AMDXDNA_HW_CONTEXT_ALL:

		ret = aie2_query_ctx_status_array(client, args);
@@ -940,8 +928,11 @@ static int aie2_get_array(struct amdxdna_client *client, 
		XDNA_ERR(xdna, "Not supported request parameter %u", args->param);

		ret = -EOPNOTSUPP;

	}



	amdxdna_pm_suspend_put(xdna);

	XDNA_DBG(xdna, "Got param %d", args->param);



dev_exit:

	drm_dev_exit(idx);

	return ret;

}
@@ -980,6 +971,10 @@ static int aie2_set_state(struct amdxdna_client *client, 
	if (!drm_dev_enter(&xdna->ddev, &idx))

		return -ENODEV;



	ret = amdxdna_pm_resume_get(xdna);

	if (ret)

		goto dev_exit;



	switch (args->param) {

	case DRM_AMDXDNA_SET_POWER_MODE:

		ret = aie2_set_power_mode(client, args);
@@ -990,6 +985,8 @@ static int aie2_set_state(struct amdxdna_client *client, 
		break;

	}



	amdxdna_pm_suspend_put(xdna);

dev_exit:

	drm_dev_exit(idx);

	return ret;

}

drivers/accel/amdxdna/aie2_pci.h

+2 −1
Original line number Diff line number Diff line
@@ -272,7 +272,8 @@ int aie2_map_host_buf(struct amdxdna_dev_hdl *ndev, u32 context_id, u64 addr, u6 
int aie2_query_status(struct amdxdna_dev_hdl *ndev, char __user *buf, u32 size, u32 *cols_filled);

int aie2_register_asyn_event_msg(struct amdxdna_dev_hdl *ndev, dma_addr_t addr, u32 size,

				 void *handle, int (*cb)(void*, void __iomem *, size_t));

int aie2_config_cu(struct amdxdna_hwctx *hwctx);

int aie2_config_cu(struct amdxdna_hwctx *hwctx,

		   int (*notify_cb)(void *, void __iomem *, size_t));

int aie2_execbuf(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job,

		 int (*notify_cb)(void *, void __iomem *, size_t));

int aie2_cmdlist_single_execbuf(struct amdxdna_hwctx *hwctx,