Unverified Commit 06461e28 authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Mark Brown
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ASoC: fsl_xcvr: enable interrupt of cmdc status update 



This enables the interrupt to be asserted when there
is a change in Capabilities data structure / Latency
request of the CMDC Status register.

Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@nxp.com>
Link: https://patch.msgid.link/1728368873-31379-2-git-send-email-shengjiu.wang@nxp.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent e6d20a9b

sound/soc/fsl/fsl_xcvr.c

+4 −0
Original line number Diff line number Diff line
@@ -1265,6 +1265,10 @@ static irqreturn_t irq0_isr(int irq, void *devid) 
		dev_dbg(dev, "DMA write request\n");

		isr_clr |= FSL_XCVR_IRQ_DMA_WR_REQ;

	}

	if (isr & FSL_XCVR_IRQ_CMDC_STATUS_UPD) {

		dev_dbg(dev, "CMDC status update\n");

		isr_clr |= FSL_XCVR_IRQ_CMDC_STATUS_UPD;

	}



	if (isr_clr) {

		regmap_write(regmap, FSL_XCVR_EXT_ISR_CLR, isr_clr);

sound/soc/fsl/fsl_xcvr.h

+1 −0
Original line number Diff line number Diff line
@@ -165,6 +165,7 @@ 
					 FSL_XCVR_IRQ_MUTE | \

					 FSL_XCVR_IRQ_FIFO_UOFL_ERR | \

					 FSL_XCVR_IRQ_HOST_WAKEUP | \

					 FSL_XCVR_IRQ_CMDC_STATUS_UPD |\

					 FSL_XCVR_IRQ_ARC_MODE)



#define FSL_XCVR_ISR_CMDC_TX_EN		BIT(3)