Commit 064e0bea authored by Andrii Nakryiko's avatar Andrii Nakryiko Committed by Alexei Starovoitov
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selftests/bpf: validate precision logic in partial_stack_load_preserves_zeros 



Enhance partial_stack_load_preserves_zeros subtest with detailed
precision propagation log checks. We know expect fp-16 to be spilled,
initially imprecise, zero const register, which is later marked as
precise even when partial stack slot load is performed, even if it's not
a register fill (!).

Acked-by: default avatarEduard Zingerman <eddyz87@gmail.com>
Signed-off-by: default avatarAndrii Nakryiko <andrii@kernel.org>
Link: https://lore.kernel.org/r/20231205184248.1502704-10-andrii@kernel.org


Signed-off-by: default avatarAlexei Starovoitov <ast@kernel.org>
parent 18a433b6

tools/testing/selftests/bpf/progs/verifier_spill_fill.c

+16 −0
Original line number Diff line number Diff line
@@ -495,6 +495,22 @@ char single_byte_buf[1] SEC(".data.single_byte_buf"); 
SEC("raw_tp")

__log_level(2)

__success

/* make sure fp-8 is all STACK_ZERO */

__msg("2: (7a) *(u64 *)(r10 -8) = 0          ; R10=fp0 fp-8_w=00000000")

/* but fp-16 is spilled IMPRECISE zero const reg */

__msg("4: (7b) *(u64 *)(r10 -16) = r0        ; R0_w=0 R10=fp0 fp-16_w=0")

/* and now check that precision propagation works even for such tricky case */

__msg("10: (71) r2 = *(u8 *)(r10 -9)         ; R2_w=P0 R10=fp0 fp-16_w=0")

__msg("11: (0f) r1 += r2")

__msg("mark_precise: frame0: last_idx 11 first_idx 0 subseq_idx -1")

__msg("mark_precise: frame0: regs=r2 stack= before 10: (71) r2 = *(u8 *)(r10 -9)")

__msg("mark_precise: frame0: regs= stack=-16 before 9: (bf) r1 = r6")

__msg("mark_precise: frame0: regs= stack=-16 before 8: (73) *(u8 *)(r1 +0) = r2")

__msg("mark_precise: frame0: regs= stack=-16 before 7: (0f) r1 += r2")

__msg("mark_precise: frame0: regs= stack=-16 before 6: (71) r2 = *(u8 *)(r10 -1)")

__msg("mark_precise: frame0: regs= stack=-16 before 5: (bf) r1 = r6")

__msg("mark_precise: frame0: regs= stack=-16 before 4: (7b) *(u64 *)(r10 -16) = r0")

__msg("mark_precise: frame0: regs=r0 stack= before 3: (b7) r0 = 0")

__naked void partial_stack_load_preserves_zeros(void)

{

	asm volatile (