Commit 06ee2f0e authored by Larisa Grigore's avatar Larisa Grigore Committed by Shawn Guo
Browse files

arm64: dts: Add DSPI entries for S32G platforms 

S32G3 and S32G2 have the same 6 SPI devices, add the DT entries. Devices
are all the same except spi0 has 8 chip selects instead of 5. Clock
settings for the chip rely on ATF Firmware [1].

[1]: https://github.com/nxp-auto-linux/arm-trusted-firmware


Co-developed-by: default avatarRadu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com>
Signed-off-by: default avatarRadu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com>
Signed-off-by: default avatarLarisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: default avatarJames Clark <james.clark@linaro.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 05bb0921

arch/arm64/boot/dts/freescale/s32g2.dtsi

+78 −0
Original line number Diff line number Diff line
@@ -376,6 +376,45 @@ uart1: serial@401cc000 { 
			status = "disabled";

		};



		spi0: spi@401d4000 {

			compatible = "nxp,s32g2-dspi";

			reg = <0x401d4000 0x1000>;

			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <8>;

			bus-num = <0>;

			dmas = <&edma0 0 7>, <&edma0 0 8>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi1: spi@401d8000 {

			compatible = "nxp,s32g2-dspi";

			reg = <0x401d8000 0x1000>;

			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <1>;

			dmas = <&edma0 0 10>, <&edma0 0 11>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi2: spi@401dc000 {

			compatible = "nxp,s32g2-dspi";

			reg = <0x401dc000 0x1000>;

			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <2>;

			dmas = <&edma0 0 13>, <&edma0 0 14>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		i2c0: i2c@401e4000 {

			compatible = "nxp,s32g2-i2c";

			reg = <0x401e4000 0x1000>;
@@ -460,6 +499,45 @@ uart2: serial@402bc000 { 
			status = "disabled";

		};



		spi3: spi@402c8000 {

			compatible = "nxp,s32g2-dspi";

			reg = <0x402c8000 0x1000>;

			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <3>;

			dmas = <&edma0 1 7>, <&edma0 1 8>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi4: spi@402cc000 {

			compatible = "nxp,s32g2-dspi";

			reg = <0x402cc000 0x1000>;

			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <4>;

			dmas = <&edma0 1 10>, <&edma0 1 11>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi5: spi@402d0000 {

			compatible = "nxp,s32g2-dspi";

			reg = <0x402d0000 0x1000>;

			interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <5>;

			dmas = <&edma0 1 13>, <&edma0 1 14>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		i2c3: i2c@402d8000 {

			compatible = "nxp,s32g2-i2c";

			reg = <0x402d8000 0x1000>;

arch/arm64/boot/dts/freescale/s32g3.dtsi

+78 −0
Original line number Diff line number Diff line
@@ -435,6 +435,45 @@ uart1: serial@401cc000 { 
			status = "disabled";

		};



		spi0: spi@401d4000 {

			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";

			reg = <0x401d4000 0x1000>;

			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <8>;

			bus-num = <0>;

			dmas = <&edma0 0 7>, <&edma0 0 8>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi1: spi@401d8000 {

			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";

			reg = <0x401d8000 0x1000>;

			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <1>;

			dmas = <&edma0 0 10>, <&edma0 0 11>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi2: spi@401dc000 {

			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";

			reg = <0x401dc000 0x1000>;

			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <2>;

			dmas = <&edma0 0 13>, <&edma0 0 14>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		i2c0: i2c@401e4000 {

			compatible = "nxp,s32g3-i2c",

				     "nxp,s32g2-i2c";
@@ -524,6 +563,45 @@ uart2: serial@402bc000 { 
			status = "disabled";

		};



		spi3: spi@402c8000 {

			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";

			reg = <0x402c8000 0x1000>;

			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <3>;

			dmas = <&edma0 1 7>, <&edma0 1 8>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi4: spi@402cc000 {

			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";

			reg = <0x402cc000 0x1000>;

			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <4>;

			dmas = <&edma0 1 10>, <&edma0 1 11>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		spi5: spi@402d0000 {

			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";

			reg = <0x402d0000 0x1000>;

			interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 26>;

			clock-names = "dspi";

			spi-num-chipselects = <5>;

			bus-num = <5>;

			dmas = <&edma0 1 13>, <&edma0 1 14>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		i2c3: i2c@402d8000 {

			compatible = "nxp,s32g3-i2c",

				     "nxp,s32g2-i2c";

arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi

+84 −0
Original line number Diff line number Diff line
@@ -173,6 +173,78 @@ i2c4-gpio-grp1 { 
			pinmux = <0x2d40>, <0x2d30>;

		};

	};



	dspi1_pins: dspi1-pins {

		dspi1-grp0 {

			pinmux = <0x72>;

			output-enable;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};



		dspi1-grp1 {

			pinmux = <0x62>;

			output-enable;

			slew-rate = <150>;

		};



		dspi1-grp2 {

			pinmux = <0x83>;

			output-enable;

			input-enable;

			slew-rate = <150>;

		};



		dspi1-grp3 {

			pinmux = <0x5F0>;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};



		dspi1-grp4 {

			pinmux = <0x3D92>,

				 <0x3DA2>,

				 <0x3DB2>;

		};

	};



	dspi5_pins: dspi5-pins {

		dspi5-grp0 {

			pinmux = <0x93>;

			output-enable;

			input-enable;

			slew-rate = <150>;

		};



		dspi5-grp1 {

			pinmux = <0xA0>;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};



		dspi5-grp2 {

			pinmux = <0x3ED2>,

				 <0x3EE2>,

				 <0x3EF2>;

		};



		dspi5-grp3 {

			pinmux = <0xB3>;

			output-enable;

			slew-rate = <150>;

		};



		dspi5-grp4 {

			pinmux = <0xC3>;

			output-enable;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};

	};

};



&can0 {
@@ -220,3 +292,15 @@ &i2c4 { 
	pinctrl-1 = <&i2c4_gpio_pins>;

	status = "okay";

};



&spi1 {

	pinctrl-0 = <&dspi1_pins>;

	pinctrl-names = "default";

	status = "okay";

};



&spi5 {

	pinctrl-0 = <&dspi5_pins>;

	pinctrl-names = "default";

	status = "okay";

};

arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi

+84 −0
Original line number Diff line number Diff line
@@ -127,6 +127,78 @@ i2c4-gpio-grp1 { 
			pinmux = <0x2d40>, <0x2d30>;

		};

	};



	dspi1_pins: dspi1-pins {

		dspi1-grp0 {

			pinmux = <0x72>;

			output-enable;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};



		dspi1-grp1 {

			pinmux = <0x62>;

			output-enable;

			slew-rate = <150>;

		};



		dspi1-grp2 {

			pinmux = <0x83>;

			output-enable;

			input-enable;

			slew-rate = <150>;

		};



		dspi1-grp3 {

			pinmux = <0x5F0>;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};



		dspi1-grp4 {

			pinmux = <0x3D92>,

				 <0x3DA2>,

				 <0x3DB2>;

		};

	};



	dspi5_pins: dspi5-pins {

		dspi5-grp0 {

			pinmux = <0x93>;

			output-enable;

			input-enable;

			slew-rate = <150>;

		};



		dspi5-grp1 {

			pinmux = <0xA0>;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};



		dspi5-grp2 {

			pinmux = <0x3ED2>,

				 <0x3EE2>,

				 <0x3EF2>;

		};



		dspi5-grp3 {

			pinmux = <0xB3>;

			output-enable;

			slew-rate = <150>;

		};



		dspi5-grp4 {

			pinmux = <0xC3>;

			output-enable;

			input-enable;

			slew-rate = <150>;

			bias-pull-up;

		};

	};

};



&can0 {
@@ -160,6 +232,18 @@ pca85073a: rtc@51 { 
	};

};



&spi1 {

	pinctrl-0 = <&dspi1_pins>;

	pinctrl-names = "default";

	status = "okay";

};



&spi5 {

	pinctrl-0 = <&dspi5_pins>;

	pinctrl-names = "default";

	status = "okay";

};



&i2c2 {

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&i2c2_pins>;