Loading arch/arm/boot/dts/imx25.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,16 @@ aliases { usb1 = &usbhost1; }; cpus { #address-cells = <0>; #size-cells = <0>; cpu { compatible = "arm,arm926ej-s"; device_type = "cpu"; }; }; asic: asic-interrupt-controller@68000000 { compatible = "fsl,imx25-asic", "fsl,avic"; interrupt-controller; Loading arch/arm/boot/dts/imx31.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,16 @@ aliases { serial4 = &uart5; }; cpus { #address-cells = <0>; #size-cells = <0>; cpu { compatible = "arm,arm1136"; device_type = "cpu"; }; }; avic: avic-interrupt-controller@60000000 { compatible = "fsl,imx31-avic", "fsl,avic"; interrupt-controller; Loading arch/arm/boot/dts/imx53.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -35,6 +35,16 @@ aliases { spi2 = &cspi; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; }; }; tzic: tz-interrupt-controller@0fffc000 { compatible = "fsl,imx53-tzic", "fsl,tzic"; interrupt-controller; Loading Loading
arch/arm/boot/dts/imx25.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,16 @@ aliases { usb1 = &usbhost1; }; cpus { #address-cells = <0>; #size-cells = <0>; cpu { compatible = "arm,arm926ej-s"; device_type = "cpu"; }; }; asic: asic-interrupt-controller@68000000 { compatible = "fsl,imx25-asic", "fsl,avic"; interrupt-controller; Loading
arch/arm/boot/dts/imx31.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,16 @@ aliases { serial4 = &uart5; }; cpus { #address-cells = <0>; #size-cells = <0>; cpu { compatible = "arm,arm1136"; device_type = "cpu"; }; }; avic: avic-interrupt-controller@60000000 { compatible = "fsl,imx31-avic", "fsl,avic"; interrupt-controller; Loading
arch/arm/boot/dts/imx53.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -35,6 +35,16 @@ aliases { spi2 = &cspi; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; }; }; tzic: tz-interrupt-controller@0fffc000 { compatible = "fsl,imx53-tzic", "fsl,tzic"; interrupt-controller; Loading