Commit 07a801de authored by Ralf Baechle's avatar Ralf Baechle Committed by
Browse files

MIPS: DSP: Set all register masks to 0x3ff. 


    
0x2ff was a typo and the value 0x1f of DSP_MASK was refering to an old
version of the documentation.
    
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent f12555d2

include/asm-mips/dsp.h

+3 −3
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 
#include <asm/mipsregs.h>



#define DSP_DEFAULT	0x00000000

#define DSP_MASK	0x1f

#define DSP_MASK	0x3ff



#define __enable_dsp_hazard()						\

do {									\
@@ -48,7 +48,7 @@ do { \ 
	tsk->thread.dsp.dspr[3] = mflo2();				\

	tsk->thread.dsp.dspr[4] = mfhi3();				\

	tsk->thread.dsp.dspr[5] = mflo3();				\

	tsk->thread.dsp.dspcontrol = rddsp(0x2ff);			\

	tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK);			\

} while (0)



#define save_dsp(tsk)							\
@@ -65,7 +65,7 @@ do { \ 
	mtlo2(tsk->thread.dsp.dspr[3]);					\

	mthi3(tsk->thread.dsp.dspr[4]);					\

	mtlo3(tsk->thread.dsp.dspr[5]);					\

	wrdsp(tsk->thread.dsp.dspcontrol, 0x2ff);			\

	wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK);			\

} while (0)



#define restore_dsp(tsk)						\