Commit 07f83755 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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spi: tegra20-slink: Add OPP support 



The SPI on Tegra belongs to the core power domain and we're going to
enable GENPD support for the core domain. Now SPI driver must use OPP
API for driving the controller's clock rate because OPP API takes care
of reconfiguring the domain's performance state in accordance to the
rate. Add OPP support to the driver.

Acked-by: default avatarMark Brown <broonie@kernel.org>
Reviewed-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 6902dc2f

drivers/spi/spi-tegra20-slink.c

+8 −1
Original line number Diff line number Diff line
@@ -18,12 +18,15 @@ 
#include <linux/kthread.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/pm_opp.h>

#include <linux/pm_runtime.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/reset.h>

#include <linux/spi/spi.h>



#include <soc/tegra/common.h>



#define SLINK_COMMAND			0x000

#define SLINK_BIT_LENGTH(x)		(((x) & 0x1f) << 0)

#define SLINK_WORD_SIZE(x)		(((x) & 0x1f) << 5)
@@ -680,7 +683,7 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi, 
	bits_per_word = t->bits_per_word;

	speed = t->speed_hz;

	if (speed != tspi->cur_speed) {

		clk_set_rate(tspi->clk, speed * 4);

		dev_pm_opp_set_rate(tspi->dev, speed * 4);

		tspi->cur_speed = speed;

	}
@@ -1066,6 +1069,10 @@ static int tegra_slink_probe(struct platform_device *pdev) 
		goto exit_free_master;

	}



	ret = devm_tegra_core_dev_init_opp_table_common(&pdev->dev);

	if (ret)

		goto exit_free_master;



	tspi->max_buf_size = SLINK_FIFO_DEPTH << 2;

	tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN;