Commit 083fa05b authored by Praful Swarnakar's avatar Praful Swarnakar Committed by Alex Deucher
Browse files

drm/amd/display: Fix Display Flicker on embedded panels 



[Why]
ASSR is dependent on Signed PSP Verstage to enable Content
Protection for eDP panels. Unsigned PSP verstage is used
during development phase causing ASSR to FAIL.
As a result, link training is performed with
DP_PANEL_MODE_DEFAULT instead of DP_PANEL_MODE_EDP for
eDP panels that causes display flicker on some panels.

[How]
- Do not change panel mode, if ASSR is disabled
- Just report and continue to perform eDP link training
with right settings further.

Signed-off-by: default avatarPraful Swarnakar <Praful.Swarnakar@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 66805763

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+7 −8
Original line number Diff line number Diff line
@@ -1826,14 +1826,13 @@ bool perform_link_training_with_retries( 
		if (panel_mode == DP_PANEL_MODE_EDP) {

			struct cp_psp *cp_psp = &stream->ctx->cp_psp;



			if (cp_psp && cp_psp->funcs.enable_assr) {

				if (!cp_psp->funcs.enable_assr(cp_psp->handle, link)) {

					/* since eDP implies ASSR on, change panel

					 * mode to disable ASSR

			if (cp_psp && cp_psp->funcs.enable_assr)

				/* ASSR is bound to fail with unsigned PSP

				 * verstage used during devlopment phase.

				 * Report and continue with eDP panel mode to

				 * perform eDP link training with right settings

				 */

					panel_mode = DP_PANEL_MODE_DEFAULT;

				}

			}

				cp_psp->funcs.enable_assr(cp_psp->handle, link);

		}

#endif