Commit 08d27daa authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2022-06-22' of... 

Merge tag 'drm-intel-fixes-2022-06-22' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

drm/i915 fixes for v5.19-rc4:
- Revert low voltage SKU check removal to fix display issues
- Apply PLL DCO fraction workaround for ADL-S
- Don't show engine classes not present in client fdinfo

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87a6a4syrr.fsf@intel.com
parents 0a86b0db c7b28f52

drivers/gpu/drm/i915/display/intel_dp.c

+29 −3
Original line number Diff line number Diff line
@@ -388,13 +388,23 @@ static int dg2_max_source_rate(struct intel_dp *intel_dp) 
	return intel_dp_is_edp(intel_dp) ? 810000 : 1350000;

}



static bool is_low_voltage_sku(struct drm_i915_private *i915, enum phy phy)

{

	u32 voltage;



	voltage = intel_de_read(i915, ICL_PORT_COMP_DW3(phy)) & VOLTAGE_INFO_MASK;



	return voltage == VOLTAGE_INFO_0_85V;

}



static int icl_max_source_rate(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);

	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);



	if (intel_phy_is_combo(dev_priv, phy) && !intel_dp_is_edp(intel_dp))

	if (intel_phy_is_combo(dev_priv, phy) &&

	    (is_low_voltage_sku(dev_priv, phy) || !intel_dp_is_edp(intel_dp)))

		return 540000;



	return 810000;
@@ -402,7 +412,23 @@ static int icl_max_source_rate(struct intel_dp *intel_dp) 


static int ehl_max_source_rate(struct intel_dp *intel_dp)

{

	if (intel_dp_is_edp(intel_dp))

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);

	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);



	if (intel_dp_is_edp(intel_dp) || is_low_voltage_sku(dev_priv, phy))

		return 540000;



	return 810000;

}



static int dg1_max_source_rate(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);

	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);



	if (intel_phy_is_combo(i915, phy) && is_low_voltage_sku(i915, phy))

		return 540000;



	return 810000;
@@ -445,7 +471,7 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp) 
			max_rate = dg2_max_source_rate(intel_dp);

		else if (IS_ALDERLAKE_P(dev_priv) || IS_ALDERLAKE_S(dev_priv) ||

			 IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))

			max_rate = 810000;

			max_rate = dg1_max_source_rate(intel_dp);

		else if (IS_JSL_EHL(dev_priv))

			max_rate = ehl_max_source_rate(intel_dp);

		else

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

+2 −2
Original line number Diff line number Diff line
@@ -2396,7 +2396,7 @@ static void icl_wrpll_params_populate(struct skl_wrpll_params *params, 
}



/*

 * Display WA #22010492432: ehl, tgl, adl-p

 * Display WA #22010492432: ehl, tgl, adl-s, adl-p

 * Program half of the nominal DCO divider fraction value.

 */

static bool
@@ -2404,7 +2404,7 @@ ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915) 
{

	return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) &&

		 IS_JSL_EHL_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) ||

		 IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) &&

		 IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) &&

		 i915->dpll.ref_clks.nssc == 38400;

}

drivers/gpu/drm/i915/i915_drm_client.c

+3 −2
Original line number Diff line number Diff line
@@ -116,6 +116,7 @@ show_client_class(struct seq_file *m, 
		total += busy_add(ctx, class);

	rcu_read_unlock();



	if (capacity)

		seq_printf(m, "drm-engine-%s:\t%llu ns\n",

			   uabi_class_names[class], total);