Commit 08d71533 authored by Fuad Tabba's avatar Fuad Tabba Committed by Marc Zyngier
Browse files

KVM: arm64: Fix FEAT_SPE_FnE to use PMSIDR_EL1.FnE, not PMSVer 



FEAT_SPE_FnE is architecturally detected via PMSIDR_EL1.FnE [6], not
ID_AA64DFR0_EL1.PMSVer. The FEAT_X macro form (register, field, value)
cannot encode a PMSIDR_EL1-based feature, so FEAT_SPE_FnE was defined
identically to FEAT_SPEv1p2 (ID_AA64DFR0_EL1, PMSVer, V1P2), producing
a duplicate that used PMSVer >= V1P2 as a proxy.

Replace the macro with feat_spe_fne(), following the same pattern as
the sibling feat_spe_fds(): guard on FEAT_SPEv1p2 and read
PMSIDR_EL1.FnE [6] directly. Wire the two NEEDS_FEAT consumers to use
the new function.

Remove the now-unused FEAT_SPE_FnE macro.

Fixes: 63d423a7 ("KVM: arm64: Switch to table-driven FGU configuration")
Signed-off-by: default avatarFuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20260424084908.370776-4-tabba@google.com


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
parent 2a623408

arch/arm64/kvm/config.c

+12 −3
Original line number Diff line number Diff line
@@ -131,7 +131,6 @@ struct reg_feat_map_desc { 
	}



#define FEAT_SPE		ID_AA64DFR0_EL1, PMSVer, IMP

#define FEAT_SPE_FnE		ID_AA64DFR0_EL1, PMSVer, V1P2

#define FEAT_BRBE		ID_AA64DFR0_EL1, BRBE, IMP

#define FEAT_TRC_SR		ID_AA64DFR0_EL1, TraceVer, IMP

#define FEAT_PMUv3		ID_AA64DFR0_EL1, PMUVer, IMP
@@ -302,6 +301,16 @@ static bool feat_spe_fds(struct kvm *kvm) 
		(read_sysreg_s(SYS_PMSIDR_EL1) & PMSIDR_EL1_FDS));

}



static bool feat_spe_fne(struct kvm *kvm)

{

	/*

	 * Revisit this if KVM ever supports SPE -- this really should

	 * look at the guest's view of PMSIDR_EL1.

	 */

	return (kvm_has_feat(kvm, FEAT_SPEv1p2) &&

		(read_sysreg_s(SYS_PMSIDR_EL1) & PMSIDR_EL1_FnE));

}



static bool feat_trbe_mpam(struct kvm *kvm)

{

	/*
@@ -537,7 +546,7 @@ static const struct reg_bits_to_feat_map hdfgrtr_feat_map[] = { 
		   HDFGRTR_EL2_PMBPTR_EL1	|

		   HDFGRTR_EL2_PMBLIMITR_EL1,

		   FEAT_SPE),

	NEEDS_FEAT(HDFGRTR_EL2_nPMSNEVFR_EL1, FEAT_SPE_FnE),

	NEEDS_FEAT(HDFGRTR_EL2_nPMSNEVFR_EL1, feat_spe_fne),

	NEEDS_FEAT(HDFGRTR_EL2_nBRBDATA		|

		   HDFGRTR_EL2_nBRBCTL		|

		   HDFGRTR_EL2_nBRBIDR,
@@ -605,7 +614,7 @@ static const struct reg_bits_to_feat_map hdfgwtr_feat_map[] = { 
		   HDFGWTR_EL2_PMBPTR_EL1	|

		   HDFGWTR_EL2_PMBLIMITR_EL1,

		   FEAT_SPE),

	NEEDS_FEAT(HDFGWTR_EL2_nPMSNEVFR_EL1, FEAT_SPE_FnE),

	NEEDS_FEAT(HDFGWTR_EL2_nPMSNEVFR_EL1, feat_spe_fne),

	NEEDS_FEAT(HDFGWTR_EL2_nBRBDATA		|

		   HDFGWTR_EL2_nBRBCTL,

		   FEAT_BRBE),