Commit 0943d92c authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Shawn Guo
Browse files

arm64: dts: freescale: use defines for interrupts 



Replace hard-coded interrupt parts (GIC, flags) with standard defines
for readability.  No changes in resulting DTBs.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 152f7a99

arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi

+27 −27
Original line number Diff line number Diff line
@@ -74,15 +74,15 @@ coreclk: coreclk { 


	timer {

		compatible = "arm,armv8-timer";

		interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */

			     <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */

			     <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */

			     <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */

		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */

			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */

			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */

			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */

	};



	pmu {

		compatible = "arm,cortex-a53-pmu";

		interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;

	};



	gic: interrupt-controller@1400000 {
@@ -93,7 +93,7 @@ gic: interrupt-controller@1400000 { 
		      <0x0 0x1402000 0 0x2000>, /* GICC */

		      <0x0 0x1404000 0 0x2000>, /* GICH */

		      <0x0 0x1406000 0 0x2000>; /* GICV */

		interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;

		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;

	};



	reboot {
@@ -159,7 +159,7 @@ QORIQ_CLK_PLL_DIV(1)>, 
		esdhc0: esdhc@1560000 {

			compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";

			reg = <0x0 0x1560000 0x0 0x10000>;

			interrupts = <0 62 0x4>;

			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			voltage-ranges = <1800 1800 3300 3300>;
@@ -178,7 +178,7 @@ scfg: scfg@1570000 { 
		esdhc1: esdhc@1580000 {

			compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";

			reg = <0x0 0x1580000 0x0 0x10000>;

			interrupts = <0 65 0x4>;

			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			voltage-ranges = <1800 1800 3300 3300>;
@@ -305,7 +305,7 @@ clockgen: clocking@1ee1000 { 
		tmu: tmu@1f00000 {

			compatible = "fsl,qoriq-tmu";

			reg = <0x0 0x1f00000 0x0 0x10000>;

			interrupts = <0 33 0x4>;

			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

			fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x60062>;

			fsl,tmu-calibration =

					<0x00000000 0x00000025>,
@@ -355,7 +355,7 @@ i2c0: i2c@2180000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2180000 0x0 0x10000>;

			interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>;

			scl-gpios = <&gpio0 2 0>;
@@ -367,7 +367,7 @@ i2c1: i2c@2190000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2190000 0x0 0x10000>;

			interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>;

			scl-gpios = <&gpio0 13 0>;
@@ -379,7 +379,7 @@ dspi: spi@2100000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2100000 0x0 0x10000>;

			interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "dspi";

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;
@@ -391,7 +391,7 @@ dspi: spi@2100000 { 
		duart0: serial@21c0500 {

			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x00 0x21c0500 0x0 0x100>;

			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			status = "disabled";
@@ -400,7 +400,7 @@ duart0: serial@21c0500 { 
		duart1: serial@21c0600 {

			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x00 0x21c0600 0x0 0x100>;

			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			status = "disabled";
@@ -409,7 +409,7 @@ duart1: serial@21c0600 { 
		gpio0: gpio@2300000 {

			compatible = "fsl,qoriq-gpio";

			reg = <0x0 0x2300000 0x0 0x10000>;

			interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;
@@ -419,7 +419,7 @@ gpio0: gpio@2300000 { 
		gpio1: gpio@2310000 {

			compatible = "fsl,qoriq-gpio";

			reg = <0x0 0x2310000 0x0 0x10000>;

			interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;
@@ -430,7 +430,7 @@ wdog0: watchdog@2ad0000 { 
			compatible = "fsl,ls1012a-wdt",

				     "fsl,imx21-wdt";

			reg = <0x0 0x2ad0000 0x0 0x10000>;

			interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>;

			big-endian;

		};
@@ -439,7 +439,7 @@ sai1: sai@2b50000 { 
			#sound-dai-cells = <0>;

			compatible = "fsl,vf610-sai";

			reg = <0x0 0x2b50000 0x0 0x10000>;

			interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL
@@ -459,7 +459,7 @@ sai2: sai@2b60000 { 
			#sound-dai-cells = <0>;

			compatible = "fsl,vf610-sai";

			reg = <0x0 0x2b60000 0x0 0x10000>;

			interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL
@@ -481,8 +481,8 @@ edma0: dma-controller@2c00000 { 
			reg = <0x0 0x2c00000 0x0 0x10000>,

			      <0x0 0x2c10000 0x0 0x10000>,

			      <0x0 0x2c20000 0x0 0x10000>;

			interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,

				     <0 103 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "edma-tx", "edma-err";

			dma-channels = <32>;

			big-endian;
@@ -496,7 +496,7 @@ QORIQ_CLK_PLL_DIV(4)>, 
		usb0: usb@2f00000 {

			compatible = "snps,dwc3";

			reg = <0x0 0x2f00000 0x0 0x10000>;

			interrupts = <0 60 0x4>;

			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;

			dr_mode = "host";

			snps,quirk-frame-length-adjustment = <0x20>;

			snps,dis_rxdet_inp3_quirk;
@@ -509,7 +509,7 @@ sata: sata@3200000 { 
			reg = <0x0 0x3200000 0x0 0x10000>,

				<0x0 0x20140520 0x0 0x4>;

			reg-names = "ahci", "sata-ecc";

			interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			dma-coherent;
@@ -519,7 +519,7 @@ sata: sata@3200000 { 
		usb1: usb@8600000 {

			compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";

			reg = <0x0 0x8600000 0x0 0x1000>;

			interrupts = <0 139 0x4>;

			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;

			dr_mode = "host";

			phy_type = "ulpi";

		};
@@ -528,7 +528,7 @@ msi: msi-controller1@1572000 { 
			compatible = "fsl,ls1012a-msi";

			reg = <0x0 0x1572000 0x0 0x8>;

			msi-controller;

			interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;

		};



		pcie1: pcie@3400000 {
@@ -536,8 +536,8 @@ pcie1: pcie@3400000 { 
			reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */

			      <0x40 0x00000000 0x0 0x00002000>; /* configuration space */

			reg-names = "regs", "config";

			interrupts = <0 118 0x4>, /* controller interrupt */

				     <0 117 0x4>; /* PME interrupt */

			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */

				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */

			interrupt-names = "aer", "pme";

			#address-cells = <3>;

			#size-cells = <2>;

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -859,8 +859,8 @@ QORIQ_CLK_PLL_DIV(16)>, 
		malidp0: display@f080000 {

			compatible = "arm,mali-dp500";

			reg = <0x0 0xf080000 0x0 0x10000>;

			interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,

				     <0 223 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "DE", "SE";

			clocks = <&dpclk>,

				 <&clockgen QORIQ_CLK_HWACCEL 2>,
@@ -1024,7 +1024,7 @@ dpclk: clock-controller@f1f0000 { 
		tmu: tmu@1f80000 {

			compatible = "fsl,qoriq-tmu";

			reg = <0x0 0x1f80000 0x0 0x10000>;

			interrupts = <0 23 0x4>;

			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

			fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;

			fsl,tmu-calibration =

					<0x00000000 0x00000024>,

arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

+54 −54
Original line number Diff line number Diff line
@@ -268,19 +268,19 @@ sec-crit { 


	timer {

		compatible = "arm,armv8-timer";

		interrupts = <1 13 0xf08>, /* Physical Secure PPI */

			     <1 14 0xf08>, /* Physical Non-Secure PPI */

			     <1 11 0xf08>, /* Virtual PPI */

			     <1 10 0xf08>; /* Hypervisor PPI */

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

		fsl,erratum-a008585;

	};



	pmu {

		compatible = "arm,cortex-a53-pmu";

		interrupts = <0 106 0x4>,

			     <0 107 0x4>,

			     <0 95 0x4>,

			     <0 97 0x4>;

		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-affinity = <&cpu0>,

				     <&cpu1>,

				     <&cpu2>,
@@ -295,7 +295,7 @@ gic: interrupt-controller@1400000 { 
		      <0x0 0x1402000 0 0x2000>, /* GICC */

		      <0x0 0x1404000 0 0x2000>, /* GICH */

		      <0x0 0x1406000 0 0x2000>; /* GICV */

		interrupts = <1 9 0xf08>;

		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

	};



	soc: soc {
@@ -352,7 +352,7 @@ crypto: crypto@1700000 { 
			#size-cells = <1>;

			ranges = <0x0 0x00 0x1700000 0x100000>;

			reg = <0x00 0x1700000 0x0 0x100000>;

			interrupts = <0 75 0x4>;

			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;

			dma-coherent;



			sec_jr0: jr@10000 {
@@ -360,7 +360,7 @@ sec_jr0: jr@10000 { 
					     "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg = <0x10000 0x10000>;

				interrupts = <0 71 0x4>;

				interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr1: jr@20000 {
@@ -368,7 +368,7 @@ sec_jr1: jr@20000 { 
					     "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg = <0x20000 0x10000>;

				interrupts = <0 72 0x4>;

				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr2: jr@30000 {
@@ -376,7 +376,7 @@ sec_jr2: jr@30000 { 
					     "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg = <0x30000 0x10000>;

				interrupts = <0 73 0x4>;

				interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr3: jr@40000 {
@@ -384,7 +384,7 @@ sec_jr3: jr@40000 { 
					     "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg = <0x40000 0x10000>;

				interrupts = <0 74 0x4>;

				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;

			};

		};
@@ -405,7 +405,7 @@ dcfg: dcfg@1ee0000 { 
		ifc: memory-controller@1530000 {

			compatible = "fsl,ifc";

			reg = <0x0 0x1530000 0x0 0x10000>;

			interrupts = <0 43 0x4>;

			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;

		};



		qspi: spi@1550000 {
@@ -415,7 +415,7 @@ qspi: spi@1550000 { 
			reg = <0x0 0x1550000 0x0 0x10000>,

				<0x0 0x40000000 0x0 0x4000000>;

			reg-names = "QuadSPI", "QuadSPI-memory";

			interrupts = <0 99 0x4>;

			interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "qspi_en", "qspi";

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>,
@@ -427,7 +427,7 @@ QORIQ_CLK_PLL_DIV(1)>, 
		esdhc: esdhc@1560000 {

			compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";

			reg = <0x0 0x1560000 0x0 0x10000>;

			interrupts = <0 62 0x4>;

			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;

			clock-frequency = <0>;

			voltage-ranges = <1800 1800 3300 3300>;

			sdhci,auto-cmd12;
@@ -438,14 +438,14 @@ esdhc: esdhc@1560000 { 
		ddr: memory-controller@1080000 {

			compatible = "fsl,qoriq-memory-controller";

			reg = <0x0 0x1080000 0x0 0x1000>;

			interrupts = <0 144 0x4>;

			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;

			big-endian;

		};



		tmu: tmu@1f00000 {

			compatible = "fsl,qoriq-tmu";

			reg = <0x0 0x1f00000 0x0 0x10000>;

			interrupts = <0 33 0x4>;

			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

			fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;

			fsl,tmu-calibration =

					<0x00000000 0x00000023>,
@@ -518,7 +518,7 @@ dspi0: spi@2100000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2100000 0x0 0x10000>;

			interrupts = <0 64 0x4>;

			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "dspi";

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;
@@ -532,7 +532,7 @@ i2c0: i2c@2180000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2180000 0x0 0x10000>;

			interrupts = <0 56 0x4>;

			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "ipg";

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;
@@ -547,7 +547,7 @@ i2c1: i2c@2190000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2190000 0x0 0x10000>;

			interrupts = <0 57 0x4>;

			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "ipg";

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;
@@ -560,7 +560,7 @@ i2c2: i2c@21a0000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x21a0000 0x0 0x10000>;

			interrupts = <0 58 0x4>;

			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "ipg";

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;
@@ -573,7 +573,7 @@ i2c3: i2c@21b0000 { 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x21b0000 0x0 0x10000>;

			interrupts = <0 59 0x4>;

			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "ipg";

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;
@@ -584,7 +584,7 @@ i2c3: i2c@21b0000 { 
		duart0: serial@21c0500 {

			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x00 0x21c0500 0x0 0x100>;

			interrupts = <0 54 0x4>;

			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

		};
@@ -592,7 +592,7 @@ duart0: serial@21c0500 { 
		duart1: serial@21c0600 {

			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x00 0x21c0600 0x0 0x100>;

			interrupts = <0 54 0x4>;

			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

		};
@@ -600,7 +600,7 @@ duart1: serial@21c0600 { 
		duart2: serial@21d0500 {

			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x0 0x21d0500 0x0 0x100>;

			interrupts = <0 55 0x4>;

			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

		};
@@ -608,7 +608,7 @@ duart2: serial@21d0500 { 
		duart3: serial@21d0600 {

			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x0 0x21d0600 0x0 0x100>;

			interrupts = <0 55 0x4>;

			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

		};
@@ -616,7 +616,7 @@ duart3: serial@21d0600 { 
		gpio1: gpio@2300000 {

			compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";

			reg = <0x0 0x2300000 0x0 0x10000>;

			interrupts = <0 66 0x4>;

			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;
@@ -626,7 +626,7 @@ gpio1: gpio@2300000 { 
		gpio2: gpio@2310000 {

			compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";

			reg = <0x0 0x2310000 0x0 0x10000>;

			interrupts = <0 67 0x4>;

			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;
@@ -636,7 +636,7 @@ gpio2: gpio@2310000 { 
		gpio3: gpio@2320000 {

			compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";

			reg = <0x0 0x2320000 0x0 0x10000>;

			interrupts = <0 68 0x4>;

			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;
@@ -646,7 +646,7 @@ gpio3: gpio@2320000 { 
		gpio4: gpio@2330000 {

			compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";

			reg = <0x0 0x2330000 0x0 0x10000>;

			interrupts = <0 134 0x4>;

			interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;
@@ -721,7 +721,7 @@ data-only@0 { 
		lpuart0: serial@2950000 {

			compatible = "fsl,ls1021a-lpuart";

			reg = <0x0 0x2950000 0x0 0x1000>;

			interrupts = <0 48 0x4>;

			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_SYSCLK 0>;

			clock-names = "ipg";

			status = "disabled";
@@ -730,7 +730,7 @@ lpuart0: serial@2950000 { 
		lpuart1: serial@2960000 {

			compatible = "fsl,ls1021a-lpuart";

			reg = <0x0 0x2960000 0x0 0x1000>;

			interrupts = <0 49 0x4>;

			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			clock-names = "ipg";
@@ -740,7 +740,7 @@ lpuart1: serial@2960000 { 
		lpuart2: serial@2970000 {

			compatible = "fsl,ls1021a-lpuart";

			reg = <0x0 0x2970000 0x0 0x1000>;

			interrupts = <0 50 0x4>;

			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			clock-names = "ipg";
@@ -750,7 +750,7 @@ lpuart2: serial@2970000 { 
		lpuart3: serial@2980000 {

			compatible = "fsl,ls1021a-lpuart";

			reg = <0x0 0x2980000 0x0 0x1000>;

			interrupts = <0 51 0x4>;

			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			clock-names = "ipg";
@@ -760,7 +760,7 @@ lpuart3: serial@2980000 { 
		lpuart4: serial@2990000 {

			compatible = "fsl,ls1021a-lpuart";

			reg = <0x0 0x2990000 0x0 0x1000>;

			interrupts = <0 52 0x4>;

			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			clock-names = "ipg";
@@ -770,7 +770,7 @@ lpuart4: serial@2990000 { 
		lpuart5: serial@29a0000 {

			compatible = "fsl,ls1021a-lpuart";

			reg = <0x0 0x29a0000 0x0 0x1000>;

			interrupts = <0 53 0x4>;

			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			clock-names = "ipg";
@@ -780,7 +780,7 @@ lpuart5: serial@29a0000 { 
		wdog0: watchdog@2ad0000 {

			compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";

			reg = <0x0 0x2ad0000 0x0 0x10000>;

			interrupts = <0 83 0x4>;

			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			clock-names = "wdog";
@@ -793,8 +793,8 @@ edma0: dma-controller@2c00000 { 
			reg = <0x0 0x2c00000 0x0 0x10000>,

			      <0x0 0x2c10000 0x0 0x10000>,

			      <0x0 0x2c20000 0x0 0x10000>;

			interrupts = <0 103 0x4>,

				     <0 103 0x4>;

			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "edma-tx", "edma-err";

			dma-channels = <32>;

			big-endian;
@@ -815,7 +815,7 @@ aux_bus: aux_bus { 
			usb0: usb@2f00000 {

				compatible = "snps,dwc3";

				reg = <0x0 0x2f00000 0x0 0x10000>;

				interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;

				dr_mode = "host";

				snps,quirk-frame-length-adjustment = <0x20>;

				snps,dis_rxdet_inp3_quirk;
@@ -827,7 +827,7 @@ usb0: usb@2f00000 { 
			usb1: usb@3000000 {

				compatible = "snps,dwc3";

				reg = <0x0 0x3000000 0x0 0x10000>;

				interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;

				dr_mode = "host";

				snps,quirk-frame-length-adjustment = <0x20>;

				snps,dis_rxdet_inp3_quirk;
@@ -839,7 +839,7 @@ usb1: usb@3000000 { 
			usb2: usb@3100000 {

				compatible = "snps,dwc3";

				reg = <0x0 0x3100000 0x0 0x10000>;

				interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;

				dr_mode = "host";

				snps,quirk-frame-length-adjustment = <0x20>;

				snps,dis_rxdet_inp3_quirk;
@@ -853,7 +853,7 @@ sata: sata@3200000 { 
				reg = <0x0 0x3200000 0x0 0x10000>,

					<0x0 0x20140520 0x0 0x4>;

				reg-names = "ahci", "sata-ecc";

				interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

						    QORIQ_CLK_PLL_DIV(1)>;

				dma-coherent;
@@ -864,21 +864,21 @@ msi1: msi-controller1@1571000 { 
			compatible = "fsl,ls1043a-msi";

			reg = <0x0 0x1571000 0x0 0x8>;

			msi-controller;

			interrupts = <0 116 0x4>;

			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

		};



		msi2: msi-controller2@1572000 {

			compatible = "fsl,ls1043a-msi";

			reg = <0x0 0x1572000 0x0 0x8>;

			msi-controller;

			interrupts = <0 126 0x4>;

			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;

		};



		msi3: msi-controller3@1573000 {

			compatible = "fsl,ls1043a-msi";

			reg = <0x0 0x1573000 0x0 0x8>;

			msi-controller;

			interrupts = <0 160 0x4>;

			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;

		};



		pcie1: pcie@3400000 {
@@ -886,8 +886,8 @@ pcie1: pcie@3400000 { 
			reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */

			      <0x40 0x00000000 0x0 0x00002000>; /* configuration space */

			reg-names = "regs", "config";

			interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>,

				     <0 118 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "pme", "aer";

			#address-cells = <3>;

			#size-cells = <2>;
@@ -913,8 +913,8 @@ pcie2: pcie@3500000 { 
			reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */

			      <0x48 0x00000000 0x0 0x00002000>; /* configuration space */

			reg-names = "regs", "config";

			interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>,

				     <0 128 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "pme", "aer";

			#address-cells = <3>;

			#size-cells = <2>;
@@ -940,8 +940,8 @@ pcie3: pcie@3600000 { 
			reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */

			      <0x50 0x00000000 0x0 0x00002000>; /* configuration space */

			reg-names = "regs", "config";

			interrupts = <0 161 IRQ_TYPE_LEVEL_HIGH>,

				     <0 162 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "pme", "aer";

			#address-cells = <3>;

			#size-cells = <2>;

arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -441,7 +441,7 @@ clockgen: clocking@1ee1000 { 
		tmu: tmu@1f00000 {

			compatible = "fsl,qoriq-tmu";

			reg = <0x0 0x1f00000 0x0 0x10000>;

			interrupts = <0 33 0x4>;

			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

			fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;

			fsl,tmu-calibration =

				/* Calibration data group 1 */

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

+24 −24

File changed.

Preview size limit exceeded, changes collapsed.